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tty: serial: lpuart: only disable CTS instead of overwriting the whole UARTMODIR register

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No need to overwrite the whole UARTMODIR register before waiting the
transmit engine complete, actually our target here is only to disable
CTS flow control to avoid the dirty data in TX FIFO may block the
transmit engine complete.
Also delete the following duplicate CTS disable configuration.

Fixes: d5a2e08343 ("tty: serial: lpuart: disable flow control while waiting for the transmit engine to complete")
Cc: stable <stable@kernel.org>
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Link: https://lore.kernel.org/r/20250307065446.1122482-1-sherry.sun@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Sherry Sun
2025-03-07 14:54:46 +08:00
committed by Greg Kroah-Hartman
parent 3c3cede051
commit e98ab45ec5
1 changed files with 7 additions and 5 deletions
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12
drivers/tty/serial/fsl_lpuart.c
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@@ -2349,15 +2349,19 @@ lpuart32_set_termios(struct uart_port *port, struct ktermios *termios,
/* update the per-port timeout */
uart_update_timeout(port, termios->c_cflag, baud);
/*
* disable CTS to ensure the transmit engine is not blocked by the flow
* control when there is dirty data in TX FIFO
*/
lpuart32_write(port, modem & ~UARTMODIR_TXCTSE, UARTMODIR);
/*
* LPUART Transmission Complete Flag may never be set while queuing a break
* character, so skip waiting for transmission complete when UARTCTRL_SBK is
* asserted.
*/
if (!(old_ctrl & UARTCTRL_SBK)) {
lpuart32_write(port, 0, UARTMODIR);
if (!(old_ctrl & UARTCTRL_SBK))
lpuart32_wait_bit_set(port, UARTSTAT, UARTSTAT_TC);
}
/* disable transmit and receive */
lpuart32_write(port, old_ctrl & ~(UARTCTRL_TE | UARTCTRL_RE),
@@ -2365,8 +2369,6 @@ lpuart32_set_termios(struct uart_port *port, struct ktermios *termios,
lpuart32_write(port, bd, UARTBAUD);
lpuart32_serial_setbrg(sport, baud);
/* disable CTS before enabling UARTCTRL_TE to avoid pending idle preamble */
lpuart32_write(port, modem & ~UARTMODIR_TXCTSE, UARTMODIR);
/* restore control register */
lpuart32_write(port, ctrl, UARTCTRL);
/* re-enable the CTS if needed */