Commit Graph

924 Commits

Author SHA1 Message Date
Abel Vesa
596900f63a dt-bindings: phy: qcom-edp: Add missing clock for X Elite
commit 6b99eeacf6 upstream.

On X Elite platform, the eDP PHY uses one more clock called ref.

The current X Elite devices supported upstream work fine without this
clock, because the boot firmware leaves this clock enabled. But we should
not rely on that. Also, even though this change breaks the ABI, it is
needed in order to make the driver disables this clock along with the
other ones, for a proper bring-down of the entire PHY.

So attach the this ref clock to the PHY.

Cc: stable@vger.kernel.org # v6.10
Fixes: 5d56078613 ("dt-bindings: phy: qcom-edp: Add X1E80100 PHY compatibles")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://patch.msgid.link/20251224-phy-qcom-edp-add-missing-refclk-v5-1-3f45d349b5ac@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-03-04 07:20:48 -05:00
Michael Riesch
377229c49c dt-bindings: phy: rockchip-inno-csi-dphy: make power-domains non-required
commit c254815b02 upstream.

There are variants of the Rockchip Innosilicon CSI DPHY (e.g., the RK3568
variant) that are powered on by default as they are part of the ALIVE power
domain.
Remove 'power-domains' from the required properties in order to avoid false
positives.

Fixes: 22c8e0a69b ("dt-bindings: phy: add compatible for rk356x to rockchip-inno-csi-dphy")
Cc: stable@kernel.org
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
Link: https://lore.kernel.org/r/20250616-rk3588-csi-dphy-v4-2-a4f340a7f0cf@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-10-19 16:33:45 +02:00
Xu Yang
d452b168da dt-bindings: phy: imx8mq-usb: fix fsl,phy-tx-vboost-level-microvolt property
commit 5b3a91b207 upstream.

The ticket TKT0676370 shows the description of TX_VBOOST_LVL is wrong in
register PHY_CTRL3 bit[31:29].

  011: Corresponds to a launch amplitude of 1.12 V.
  010: Corresponds to a launch amplitude of 1.04 V.
  000: Corresponds to a launch amplitude of 0.88 V.

After updated:

  011: Corresponds to a launch amplitude of 0.844 V.
  100: Corresponds to a launch amplitude of 1.008 V.
  101: Corresponds to a launch amplitude of 1.156 V.

This will correct it accordingly.

Fixes: b2e75563dc ("dt-bindings: phy: imx8mq-usb: add phy tuning properties")
Cc: stable@vger.kernel.org
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250430094502.2723983-1-xu.yang_2@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-10 07:13:00 -04:00
Abel Vesa
16fde3e076 dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Fix X1E80100 resets entries
The PCIe 6a PHY is actually Gen4 4-lanes capable. So the gen4x4 compatible
describes it. But according to the schema, currently the gen4x4 compatible
doesn't require both PHY and PHY-nocsr resets, while the HW does. So fix
that by adding the gen4x4 compatible alongside the gen4x2 one for the
resets description.

Fixes: 0c5f4d23f7 ("dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x4")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202410182029.n2zPkuGx-lkp@intel.com/
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20241021-phy-qcom-qmp-pcie-fix-x1e80100-gen4x4-resets-v3-1-1918c46fc37c@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-10-21 23:33:25 +05:30
Johan Hovold
938ade15ab dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: add missing x1e80100 pipediv2 clocks
The x1e80100 QMP PCIe PHYs all have a pipediv2 clock that needs to be
described.

Fixes: e94b29f2bd ("dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHYs")
Cc: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240916082307.29393-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-10-17 18:31:17 +05:30
Linus Torvalds
4965ddb166 Merge tag 'usb-6.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB/Thunderbolt updates from Greg KH:
 "Here is the large set of USB and Thunderbolt changes for 6.12-rc1.

  Nothing "major" in here, except for a new 9p network gadget that has
  been worked on for a long time (all of the needed acks are here)

  Other than that, it's the usual set of:

   - Thunderbolt / USB4 driver updates and additions for new hardware

   - dwc3 driver updates and new features added

   - xhci driver updates

   - typec driver updates

   - USB gadget updates and api additions to make some gadgets more
     configurable by userspace

   - dwc2 driver updates

   - usb phy driver updates

   - usbip feature additions

   - other minor USB driver updates

  All of these have been in linux-next for a long time with no reported
  issues"

* tag 'usb-6.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (145 commits)
  sub: cdns3: Use predefined PCI vendor ID constant
  sub: cdns2: Use predefined PCI vendor ID constant
  USB: misc: yurex: fix race between read and write
  USB: misc: cypress_cy7c63: check for short transfer
  USB: appledisplay: close race between probe and completion handler
  USB: class: CDC-ACM: fix race between get_serial and set_serial
  usb: r8a66597-hcd: make read-only const arrays static
  usb: typec: ucsi: Fix busy loop on ASUS VivoBooks
  usb: dwc3: rtk: Clean up error code in __get_dwc3_maximum_speed()
  usb: storage: ene_ub6250: Fix right shift warnings
  usb: roles: Improve the fix for a false positive recursive locking complaint
  locking/mutex: Introduce mutex_init_with_key()
  locking/mutex: Define mutex_init() once
  net/9p/usbg: fix CONFIG_USB_GADGET dependency
  usb: xhci: fix loss of data on Cadence xHC
  usb: xHCI: add XHCI_RESET_ON_RESUME quirk for Phytium xHCI host
  usb: dwc3: imx8mp: disable SS_CON and U3 wakeup for system sleep
  usb: dwc3: imx8mp: add 2 software managed quirk properties for host mode
  usb: host: xhci-plat: Parse xhci-missing_cas_quirk and apply quirk
  usb: misc: onboard_usb_dev: add Microchip usb5744 SMBus programming support
  ...
2024-09-26 09:45:36 -07:00
Linus Torvalds
fbb86b0d5f Merge tag 'phy-for-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull phy updates from Vinod Koul:
 "New hw support:
   - Rcar usb2 support for RZ/G3S SoC
   - Nuvoton MA35 SoC USB 2.0 PHY driver

  Removed:
   - obsolete qcom,usb-8x16-phy bindings

  Updates:
   - 4 lane PCIe support for Qualcomm X1E80100
   - Constify structure in subsystem update
   - Subsystem simplification with scoped for each OF child loop update
   - Yaml conversion for Qualcomm sata phy, Hiilicon hi3798cv200-combphy
     bindings"

* tag 'phy-for-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (40 commits)
  phy: renesas: rcar-gen3-usb2: Add support for the RZ/G3S SoC
  dt-bindings: phy: renesas,usb2-phy: Document RZ/G3S phy bindings
  phy: renesas: rcar-gen3-usb2: Add support to initialize the bus
  phy: ti: j721e-wiz: Simplify with scoped for each OF child loop
  phy: ti: j721e-wiz: Drop OF node reference earlier for simpler code
  phy: ti: gmii-sel: Simplify with dev_err_probe()
  phy: ti: am654-serdes: Use scoped device node handling to simplify error paths
  phy: qcom: qmp-pcie-msm8996: Simplify with scoped for each OF child loop
  phy: mediatek: xsphy: Simplify with scoped for each OF child loop
  phy: mediatek: tphy: Simplify with scoped for each OF child loop
  phy: hisilicon: usb2: Simplify with scoped for each OF child loop
  phy: cadence: sierra: Simplify with scoped for each OF child loop
  phy: broadcom: brcm-sata: Simplify with scoped for each OF child loop
  phy: broadcom: bcm-cygnus-pcie: Simplify with scoped for each OF child loop
  phy: nuvoton: add new driver for the Nuvoton MA35 SoC USB 2.0 PHY
  dt-bindings: phy: nuvoton,ma35-usb2-phy: add new bindings
  phy: qcom: qmp-pcie: Configure all tables on port B PHY
  phy: airoha: adjust initialization delay in airoha_pcie_phy_init()
  dt-bindings: phy: socionext,uniphier: add top-level constraints
  phy: qcom: qmp-pcie: Add Gen4 4-lanes mode for X1E80100
  ...
2024-09-23 14:05:10 -07:00
Linus Torvalds
de848da12f Merge tag 'drm-next-2024-09-19' of https://gitlab.freedesktop.org/drm/kernel
Pull drm updates from Dave Airlie:
 "This adds a couple of patches outside the drm core, all should be
  acked appropriately, the string and pstore ones are the main ones that
  come to mind.

  Otherwise it's the usual drivers, xe is getting enabled by default on
  some new hardware, we've changed the device number handling to allow
  more devices, and we added some optional rust code to create QR codes
  in the panic handler, an idea first suggested I think 10 years ago :-)

  string:
   - add mem_is_zero()

  core:
   - support more device numbers
   - use XArray for minor ids
   - add backlight constants
   - Split dma fence array creation into alloc and arm

  fbdev:
   - remove usage of old fbdev hooks

  kms:
   - Add might_fault() to drm_modeset_lock priming
   - Add dynamic per-crtc vblank configuration support

  dma-buf:
   - docs cleanup

  buddy:
   - Add start address support for trim function

  printk:
   - pass description to kmsg_dump

  scheduler:
   - Remove full_recover from drm_sched_start

  ttm:
   - Make LRU walk restartable after dropping locks
   - Allow direct reclaim to allocate local memory

  panic:
   - add display QR code (in rust)

  displayport:
   - mst: GUID improvements

  bridge:
   - Silence error message on -EPROBE_DEFER
   - analogix: Clean aup
   - bridge-connector: Fix double free
   - lt6505: Disable interrupt when powered off
   - tc358767: Make default DP port preemphasis configurable
   - lt9611uxc: require DRM_BRIDGE_ATTACH_NO_CONNECTOR
   - anx7625: simplify OF array handling
   - dw-hdmi: simplify clock handling
   - lontium-lt8912b: fix mode validation
   - nwl-dsi: fix mode vsync/hsync polarity

  xe:
   - Enable LunarLake and Battlemage support
   - Introducing Xe2 ccs modifiers for integrated and discrete graphics
   - rename xe perf to xe observation
   - use wb caching on DGFX for system memory
   - add fence timeouts
   - Lunar Lake graphics/media/display workarounds
   - Battlemage workarounds
   - Battlemage GSC support
   - GSC and HuC fw updates for LL/BM
   - use dma_fence_chain_free
   - refactor hw engine lookup and mmio access
   - enable priority mem read for Xe2
   - Add first GuC BMG fw
   - fix dma-resv lock
   - Fix DGFX display suspend/resume
   - Use xe_managed for kernel BOs
   - Use reserved copy engine for user binds on faulting devices
   - Allow mixing dma-fence jobs and long-running faulting jobs
   - fix media TLB invalidation
   - fix rpm in TTM swapout path
   - track resources and VF state by PF

  i915:
   - Type-C programming fix for MTL+
   - FBC cleanup
   - Calc vblank delay more accurately
   - On DP MST, Enable LT fallback for UHBR<->non-UHBR rates
   - Fix DP LTTPR detection
   - limit relocations to INT_MAX
   - fix long hangs in buddy allocator on DG2/A380

  amdgpu:
   - Per-queue reset support
   - SDMA devcoredump support
   - DCN 4.0.1 updates
   - GFX12/VCN4/JPEG4 updates
   - Convert vbios embedded EDID to drm_edid
   - GFX9.3/9.4 devcoredump support
   - process isolation framework for GFX 9.4.3/4
   - take IOMMU mappings into account for P2P DMA

  amdkfd:
   - CRIU fixes
   - HMM fix
   - Enable process isolation support for GFX 9.4.3/4
   - Allow users to target recommended SDMA engines
   - KFD support for targetting queues on recommended SDMA engines

  radeon:
   - remove .load and drm_dev_alloc
   - Fix vbios embedded EDID size handling
   - Convert vbios embedded EDID to drm_edid
   - Use GEM references instead of TTM
   - r100 cp init cleanup
   - Fix potential overflows in evergreen CS offset tracking

  msm:
   - DPU:
      - implement DP/PHY mapping on SC8180X
      - Enable writeback on SM8150, SC8180X, SM6125, SM6350
   - DP:
      - Enable widebus on all relevant chipsets
      - MSM8998 HDMI support
   - GPU:
      - A642L speedbin support
      - A615/A306/A621 support
      - A7xx devcoredump support

  ast:
   - astdp: Support AST2600 with VGA
   - Clean up HPD
   - Fix timeout loop for DP link training
   - reorganize output code by type (VGA, DP, etc)
   - convert to struct drm_edid
   - fix BMC handling for all outputs

  exynos:
   - drop stale MAINTAINERS pattern
   - constify struct

  loongson:
   - use GEM refcount over TTM

  mgag200:
   - Improve BMC handling
   - Support VBLANK intterupts
   - transparently support BMC outputs

  nouveau:
   - Refactor and clean up internals
   - Use GEM refcount over TTM's

  gm12u320:
   - convert to struct drm_edid

  gma500:
   - update i2c terms

  lcdif:
   - pixel clock fix

  host1x:
   - fix syncpoint IRQ during resume
   - use iommu_paging_domain_alloc()

  imx:
   - ipuv3: convert to struct drm_edid

  omapdrm:
   - improve error handling
   - use common helper for_each_endpoint_of_node()

  panel:
   - add support for BOE TV101WUM-LL2 plus DT bindings
   - novatek-nt35950: improve error handling
   - nv3051d: improve error handling
   - panel-edp:
      - add support for BOE NE140WUM-N6G
      - revert support for SDC ATNA45AF01
   - visionox-vtdr6130:
      - improve error handling
      - use devm_regulator_bulk_get_const()
   - boe-th101mb31ig002:
      - Support for starry-er88577 MIPI-DSI panel plus DT
      - Fix porch parameter
   - edp: Support AOU B116XTN02.3, AUO B116XAN06.1, AOU B116XAT04.1, BOE
     NV140WUM-N41, BOE NV133WUM-N63, BOE NV116WHM-A4D, CMN N116BCA-EA2,
     CMN N116BCP-EA2, CSW MNB601LS1-4
   - himax-hx8394: Support Microchip AC40T08A MIPI Display panel plus DT
   - ilitek-ili9806e: Support Densitron DMT028VGHMCMI-1D TFT plus DT
   - jd9365da:
      - Support Melfas lmfbx101117480 MIPI-DSI panel plus DT
      - Refactor for code sharing
   - panel-edp: fix name for HKC MB116AN01
   - jd9365da: fix "exit sleep" commands
   - jdi-fhd-r63452: simplify error handling with DSI multi-style
     helpers
   - mantix-mlaf057we51: simplify error handling with DSI multi-style
     helpers
   - simple:
      - support Innolux G070ACE-LH3 plus DT bindings
      - support On Tat Industrial Company KD50G21-40NT-A1 plus DT
        bindings
   - st7701:
      - decouple DSI and DRM code
      - add SPI support
      - support Anbernic RG28XX plus DT bindings

  mediatek:
   - support alpha blending
   - remove cl in struct cmdq_pkt
   - ovl adaptor fix
   - add power domain binding for mediatek DPI controller

  renesas:
   - rz-du: add support for RZ/G2UL plus DT bindings

  rockchip:
   - Improve DP sink-capability reporting
   - dw_hdmi: Support 4k@60Hz
   - vop:
      - Support RGB display on Rockchip RK3066
      - Support 4096px width

  sti:
   - convert to struct drm_edid

  stm:
   - Avoid UAF wih managed plane and CRTC helpers
   - Fix module owner
   - Fix error handling in probe
   - Depend on COMMON_CLK
   - ltdc:
      - Fix transparency after disabling plane
      - Remove unused interrupt

  tegra:
   - gr3d: improve PM domain handling
   - convert to struct drm_edid
   - Call drm_atomic_helper_shutdown()

  vc4:
   - fix PM during detect
   - replace DRM_ERROR() with drm_error()
   - v3d: simplify clock retrieval

  v3d:
   - Clean up perfmon

  virtio:
   - add DRM capset"

* tag 'drm-next-2024-09-19' of https://gitlab.freedesktop.org/drm/kernel: (1326 commits)
  drm/xe: Fix missing conversion to xe_display_pm_runtime_resume
  drm/xe/xe2hpg: Add Wa_15016589081
  drm/xe: Don't keep stale pointer to bo->ggtt_node
  drm/xe: fix missing 'xe_vm_put'
  drm/xe: fix build warning with CONFIG_PM=n
  drm/xe: Suppress missing outer rpm protection warning
  drm/xe: prevent potential UAF in pf_provision_vf_ggtt()
  drm/amd/display: Add all planes on CRTC to state for overlay cursor
  drm/i915/bios: fix printk format width
  drm/i915/display: Fix BMG CCS modifiers
  drm/amdgpu: get rid of bogus includes of fdtable.h
  drm/amdkfd: CRIU fixes
  drm/amdgpu: fix a race in kfd_mem_export_dmabuf()
  drm: new helper: drm_gem_prime_handle_to_dmabuf()
  drm/amdgpu/atomfirmware: Silence UBSAN warning
  drm/amdgpu: Fix kdoc entry in 'amdgpu_vm_cpu_prepare'
  drm/amd/amdgpu: apply command submission parser for JPEG v1
  drm/amd/amdgpu: apply command submission parser for JPEG v2+
  drm/amd/pm: fix the pp_dpm_pcie issue on smu v14.0.2/3
  drm/amd/pm: update the features set on smu v14.0.2/3
  ...
2024-09-19 10:18:15 +02:00
Yu-Chun Lin
a7fcc23274 dt-bindings: Fix various typos
Corrected several typos in Documentation/devicetree/bindings files.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Kuan-Wei Chiu <visitorckw@gmail.com>
Reviewed-by: Matti Vaittinen <mazziesaccount@gmail.com>
Signed-off-by: Yu-Chun Lin <eleanor15x@gmail.com>
Link: https://lore.kernel.org/r/20240905151943.2792056-1-eleanor15x@gmail.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-09-13 14:01:34 -05:00
Xu Yang
d40ae4cdd9 dt-bindings: phy: mxs-usb-phy: add nxp,sim property
i.MX7ULP need properly set System Integration Module(SIM) module to make
usb wakeup work well. This will add a "nxp,sim" property.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Link: https://lore.kernel.org/r/20240903075810.1196928-1-xu.yang_2@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-09-03 10:11:33 +02:00
Marc Gonzalez
8886def25e dt-bindings: phy: add qcom,hdmi-phy-8998
HDMI PHY block embedded in the APQ8098.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
Patchwork: https://patchwork.freedesktop.org/patch/605634/
Link: https://lore.kernel.org/r/20240724-hdmi-tx-v7-1-e44a20553464@freebox.fr
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-09-02 02:53:44 +03:00
Claudiu Beznea
f3c8498551 dt-bindings: phy: renesas,usb2-phy: Document RZ/G3S phy bindings
Document the RZ/G3S PHY bindings. The RZ/G3S USB PHY is almost identical
with the RZ/G2L USB PHY. The difference is that there is a hardware
limitation on the max burst size used when the BUS master interface
issues a transfer request for RZ/G3S that is configured though PHY
registers.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240822152801.602318-12-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-30 13:33:44 +05:30
Hui-Ping Chen
c174f1c6c1 dt-bindings: phy: nuvoton,ma35-usb2-phy: add new bindings
Add dt-bindings for USB2 PHY found on the Nuvoton MA35 SoC.

Signed-off-by: Hui-Ping Chen <hpchen0nvt@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240805030356.14565-2-hpchen0nvt@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 23:51:32 +05:30
Krzysztof Kozlowski
45a4237b9b dt-bindings: phy: socionext,uniphier: add top-level constraints
Properties with variable number of items per each device are expected to
have widest constraints in top-level "properties:" block and further
customized (narrowed) in "if:then:".  Add missing top-level constraints
for clock-names and reset-names.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20240818172835.121757-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 23:46:25 +05:30
Abel Vesa
0c5f4d23f7 dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x4
The sixth PCIe instance on X1E80100 can be used in either 4-lane mode or
2-lane mode. Document the 4-lane mode as a separate compatible.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240823-x1e80100-phy-add-gen4x4-v3-1-b7765631ca01@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 23:39:01 +05:30
Cristian Ciocaltea
a652f22100 dt-bindings: phy: rockchip,rk3588-hdptx-phy: Add #clock-cells
The HDMI PHY can be used as a clock provider on RK3588 SoC, hence add
the necessary '#clock-cells' property.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20240620-rk3588-hdmiphy-clkprov-v2-3-6a2d2164e508@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-05 21:43:15 +05:30
Rayyan Ansari
b52a38ab1e dt-bindings: phy: drop obsolete qcom,usb-8x16-phy bindings
Remove the bindings for the Qualcomm 8x16 PHY driver that was dropped
in commit 4756f35fdf ("usb: phy: remove phy-qcom-8x16-usb.c") in 2017.

Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240711122016.41806-1-rayyan.ansari@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-07-31 17:00:36 +05:30
Rob Herring (Arm)
dd1051f932 dt-bindings: phy: hisilicon,hi3798cv200-combphy: Convert to DT schema
Convert the hisilicon,hi3798cv200-combphy binding to DT schema format.

Drop the example as arm/hisilicon/controller/hi3798cv200-perictrl.yaml
already contains an example of this binding.

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240711152313.2364383-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-07-31 17:00:03 +05:30
Rayyan Ansari
4bf8b462f8 dt-bindings: phy: qcom,sata-phy: convert to dtschema
Convert the bindings for the SATA PHY on both apq8064 and ipq806x from
the old text format to yaml.

Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240715130854.53501-2-rayyan.ansari@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-07-31 16:38:24 +05:30
Lorenzo Bianconi
5854d0aa52 dt-bindings: phy: airoha: Add dtime and Rx AEQ IO registers
Introduce Tx-Rx detection time and Rx AEQ mappings in Airoha EN7581
PCIe-PHY binding. This change is not introducing any backward compatibility
issue since the EN7581 dts is not upstream yet.

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/a018329ff9678f3360bc6381294f95c62d34f3e3.1719682943.git.lorenzo@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-07-02 18:54:28 +05:30
Shresth Prasad
e245c725c7 dt-bindings: phy: rockchip-emmc-phy: Convert to dtschema
Convert txt bindings of Rockchip EMMC PHY to dtschema to allow
for validation.

Signed-off-by: Shresth Prasad <shresthprasad7@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240620212806.3011-2-shresthprasad7@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-07-02 18:54:01 +05:30
Yijie Yang
3d83abcae6 dt-bindings: phy: qcom,qmp-usb: fix spelling error
Correct the spelling error, changing 'com' to 'qcom'.

Cc: stable@vger.kernel.org
Fixes: f75a4b3a6e ("dt-bindings: phy: qcom,qmp-usb: Add QDU1000 USB3 PHY")
Signed-off-by: Yijie Yang <quic_yijiyang@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240624021916.2033062-1-quic_yijiyang@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-07-02 18:53:04 +05:30
André Draszik
e340c041b7 dt-bindings: phy: samsung,usb3-drd-phy: add gs101 compatible
Add a dedicated google,gs101-usb31drd-phy compatible for Google Tensor
gs101 SoC.

It needs additional clocks enabled for register access, and additional
memory regions (PCS & PMA) are required for successful configuration.

It also requires various power supplies (regulators) for the internal
circuitry to work. The required voltages are:
* pll-supply: 0.85V
* dvdd-usb20-supply: 0.85V (+10%, -7%)
* vddh-usb20-supply: 1.8V (+10%, -7%)
* vdd33-usb20-supply: 3.3V (+10%, -7%)
* vdda-usbdp-supply: 0.85V
* vddh-usbdp-supply: 1.8V

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20240617-usb-phy-gs101-v3-1-b66de9ae7424@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-07-02 18:52:04 +05:30
Lorenzo Bianconi
e2d0317e66 dt-bindings: phy: airoha: Add PCIe PHY controller
Introduce device-tree binding documentation for Airoha EN7581 PCIe PHY
controller.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/656133f865433c1d02f00a3abbb1aa9312d2a24e.1718485860.git.lorenzo@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-06-20 21:59:21 +05:30
Richard Zhu
7c46101aa6 dt-bindings: phy: Add i.MX8Q HSIO SerDes PHY binding
Add i.MX8QM and i.MX8QXP HSIO SerDes PHY binding.
Introduce one HSIO configuration 'fsl,hsio-cfg', which need be set at
initialization according to board design.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/1716962565-2084-2-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-06-15 17:52:01 +05:30
Shengyang Chen
e4a8e87250 dt-bindings: phy: Add starfive,jh7110-dphy-tx
StarFive SoCs like the jh7110 use a MIPI D-PHY TX
controller based on a M31 IP. Add a binding for it.

Signed-off-by: Shengyang Chen <shengyang.chen@starfivetech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240418035020.47876-2-shengyang.chen@starfivetech.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-06-15 17:38:30 +05:30
Herman van Hazendonk
cd13368db0 dt-bindings: phy: qcom,usb-hs-phy: Add compatible
Adds qcom,usb-hs-phy-msm8660 compatible

Used by HP Touchpad (tenderloin) for example.

Signed-off-by: Herman van Hazendonk <github.com@herrie.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240417065454.3599824-1-github.com@herrie.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-06-15 17:19:49 +05:30
Dmitry Baryshkov
7cd3e58606 dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: drop second output clock name
There is no need to specify exact name for the second (AUX) output
clock. It has never been used for the lookups based on the system clock
name. Partially revert commit 72bea132f3 ("dt-bindings: phy:
qcom,sc8280xp-qmp-pcie-phy: document PHY AUX clock on SM8[456]50 SoCs"),
returning compatibility with the existing device tree: reduce
clock-output-names to always contain a single entry.

Fixes: 72bea132f3 ("dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: document PHY AUX clock on SM8[456]50 SoCs")
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240614-fix-pcie-phy-compat-v3-2-730d1811acf4@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-06-15 17:01:17 +05:30
Neil Armstrong
8e97ddd586 dt-bindings: phy: g12a-usb2-phy: add optional power-domains
On newer SoCs, the USB2 PHY can require a power-domain to operate,
add it as optional.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240605-topic-amlogic-upstream-bindings-fixes-power-domains-phy-v1-1-c819b0ecd8c8@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-06-12 23:16:15 +05:30
Josua Mayer
4de4802649 dt-bindings: phy: armada-cp110-utmi: add optional swap-dx-lanes property
Armada CP110 UTMI supports swapping D+ and D- signals.
usb251xb.yaml already describes a suitable device-tree property for the
same purpose but as child usb controller node.

Add optional swap-dx-lanes device-tree property to armada cp110 utmi phy
with same semantics as usb251xb:
The property lists all ports that swap D+ and D-, unlisted ports are
considered correct.

Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240602-cn9130-som-v6-4-89393e86d4c7@solid-run.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-06-12 16:51:21 +05:30
devi priya
29f09daab9 dt-bindings: phy: qcom,ipq8074-qmp-pcie: Document the IPQ9574 QMP PCIe PHYs
Document the QMP PCIe PHYs on IPQ9574 platform.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: devi priya <quic_devipriy@quicinc.com>
Link: https://lore.kernel.org/r/20240516032436.2681828-2-quic_devipriy@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-06-03 19:32:32 +05:30
Bjorn Andersson
4dc7e51a9e dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add sc8180x USB3 compatible
The SC8180X has two USB3 UNIPHY QMP blocks, add a compatible for these.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240525-sc8180x-usb-mp-v1-1-60a904392438@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-06-03 19:27:46 +05:30
Linus Torvalds
8053d2ffc4 Merge tag 'phy-for-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull generic phy updates from Vinod Koul:
 "New HW Support:
   - Support for Embedded DisplayPort and DisplayPort submodes and
     driver support on Qualcomm X1E80100 edp driver
   - Qualcomm QMP UFS PHY for SM8475, QMP USB phy for QDU1000/QRU1000
     and eusb2-repeater for SMB2360
   - Samsung HDMI PHY for i.MX8MP, gs101 UFS phy
   - Mediatek XFI T-PHY support for mt7988
   - Rockchip usbdp combo phy driver

  Updates:
   - Qualcomm x4 lane EP support for sa8775p, v4 ad v6 support for
     X1E80100, SM8650 tables for UFS Gear 4 & 5 and correct voltage
     swing tables
   - Freescale imx8m-pci pcie link-up updates
   - Rockchip rx-common-refclk-mode support
   - More platform remove callback returning void conversions"

* tag 'phy-for-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (43 commits)
  dt-bindings: phy: qcom,usb-snps-femto-v2: use correct fallback for sc8180x
  dt-bindings: phy: qcom,sc8280xp-qmp-ufs-phy: fix msm899[68] power-domains
  dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: fix x1e80100-gen3x2 schema
  phy: qcpm-qmp-usb: Add support for QDU1000/QRU1000
  dt-bindings: phy: qcom,qmp-usb: Add QDU1000 USB3 PHY
  dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for QDU1000
  phy: qcom-qmp-pcie: add x4 lane EP support for sa8775p
  phy: samsung-ufs: ufs: exit on first reported error
  phy: samsung-ufs: ufs: remove superfluous mfd/syscon.h header
  phy: rockchip: fix CONFIG_TYPEC dependency
  phy: rockchip: usbdp: fix uninitialized variable
  phy: rockchip-snps-pcie3: add support for rockchip,rx-common-refclk-mode
  dt-bindings: phy: rockchip,pcie3-phy: add rockchip,rx-common-refclk-mode
  phy: rockchip: add usbdp combo phy driver
  dt-bindings: phy: add rockchip usbdp combo phy document
  phy: add driver for MediaTek XFI T-PHY
  dt-bindings: phy: mediatek,mt7988-xfi-tphy: add new bindings
  phy: freescale: fsl-samsung-hdmi: Convert to platform remove callback returning void
  phy: qcom: qmp-ufs: update SM8650 tables for Gear 4 & 5
  MAINTAINERS: Add phy-gs101-ufs file to Tensor GS101.
  ...
2024-05-21 11:19:18 -07:00
Linus Torvalds
06f054b1fe Merge tag 'devicetree-for-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
 "DT Bindings:

   - Convert samsung,exynos5-dp, atmel,lcdc, aspeed,ast2400-wdt bindings
     to schemas

   - Add bindings for Allwinner H616 NMI controller, Renesas r8a779g0
     irqc, Renesas R-Car V4M TMU and CMT timers, Freescale S32G3
     linflexuart, and Mediatek MT7988 XHCI

   - Add 'reg' constraints on DSI and SPI display panels

   - More dropping of unnecessary quotes in schemas

   - Use full paths rather than relative paths in schema $refs

   - Drop redundant storing of phandle for reserved memory

  DT Core:

   - Use scope based cleanups for kfree() and of_node_put()

   - Track interrupt-map and power-supplies for fw_devlink

   - Add buffer overflow check in of_modalias()

   - Add and use __of_prop_free() helper for freeing struct property"

* tag 'devicetree-for-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (25 commits)
  of: property: Add fw_devlink support for interrupt-map property
  dt-bindings: display: panel: constrain 'reg' in DSI panels
  dt-bindings: display: panel: constrain 'reg' in SPI panels
  dt-bindings: display: samsung,ams495qa01: add missing SPI properties ref
  dt-bindings: Use full path to other schemas
  dt-bindings: PCI: qcom,pcie-sm8350: Drop redundant 'oneOf' sub-schema
  of: module: add buffer overflow check in of_modalias()
  dt-bindings: PCI: microchip: increase number of items in ranges property
  dt-bindings: Drop unnecessary quotes on keys
  dt-bindings: interrupt-controller: mediatek,mt6577-sysirq: Drop unnecessary quotes
  of: property: Use scope based cleanup on port_node
  of: reserved_mem: Remove the use of phandle from the reserved_mem APIs
  of: property: fw_devlink: Add support for "power-supplies" binding
  dt-bindings: watchdog: aspeed,ast2400-wdt: Convert to DT schema
  dt-bindings: irq: sun7i-nmi: Add binding for the H616 NMI controller
  dt-bindings: interrupt-controller: renesas,irqc: Add r8a779g0 support
  dt-bindings: timer: renesas,tmu: Add R-Car V4M support
  dt-bindings: timer: renesas,cmt: Add R-Car V4M support
  of: Use scope based of_node_put() cleanups
  of: Use scope based kfree() cleanups
  ...
2024-05-17 17:27:49 -07:00
Dmitry Baryshkov
960b3f023d dt-bindings: phy: qcom,usb-snps-femto-v2: use correct fallback for sc8180x
The qcom,sc8180x-usb-hs-phy device uses qcom,usb-snps-hs-7nm-phy
fallback. Correct the schema for this platform.

Fixes: 9160fb7c39 ("dt-bindings: phy: qcom,usb-snps-femto-v2: use fallback compatibles")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-3-f1fd15c33fb3@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-05-04 17:48:05 +05:30
Dmitry Baryshkov
59e377a124 dt-bindings: phy: qcom,sc8280xp-qmp-ufs-phy: fix msm899[68] power-domains
The Qualcomm MSM8996 and MSM8998 platforms don't have separate power
domain for the UFS PHY. Replace required:power-domains with the
conditional schema.

Fixes: dc5cb63592 ("dt-bindings: phy: migrate QMP UFS PHY bindings to qcom,sc8280xp-qmp-ufs-phy.yaml")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-2-f1fd15c33fb3@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-05-04 17:46:52 +05:30
Dmitry Baryshkov
484b139a4c dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: fix x1e80100-gen3x2 schema
The qcom,x1e80100-qmp-gen3x2-pcie-phy device doesn't have second reset,
drop it from the clause enforcing second reset to be used.

Fixes: e94b29f2bd ("dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHYs")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-1-f1fd15c33fb3@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-05-04 17:46:52 +05:30
Komal Bajaj
f75a4b3a6e dt-bindings: phy: qcom,qmp-usb: Add QDU1000 USB3 PHY
Add dt-bindings for USB3 PHY found on Qualcomm QDU/QRU1000 SoC.

Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240502082017.13777-3-quic_kbajaj@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-05-04 17:39:06 +05:30
Komal Bajaj
fbd3b6fe36 dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for QDU1000
Document the compatible string for USB phy found in Qualcomm
QDU/QRU1000 SoC.

Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240502082017.13777-2-quic_kbajaj@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-05-04 17:39:06 +05:30
Rob Herring (Arm)
15be4f7ce5 dt-bindings: Drop unnecessary quotes on keys
The yamllint quoted-strings check wasn't checking keys for quotes, but
support for checking keys was added in 1.34 release. Fix all the errors
found when enabling the check.

Clean-up the xilinx-versal-cpm formatting while we're here.

Acked-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20240426202239.2837516-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-05-03 07:50:05 -05:00
Niklas Cassel
46492d1006 dt-bindings: phy: rockchip,pcie3-phy: add rockchip,rx-common-refclk-mode
>From the RK3588 Technical Reference Manual, Part1,
section 6.19 PCIe3PHY_GRF Register Description:
"rxX_cmn_refclk_mode"
RX common reference clock mode for lane X. This mode should be enabled
only when the far-end and near-end devices are running with a common
reference clock.

The hardware reset value for this field is 0x1 (enabled).
Note that this register field is only available on RK3588, not on RK3568.

The link training either fails or is highly unstable (link state will jump
continuously between L0 and recovery) when this mode is enabled while
using an endpoint running in Separate Reference Clock with No SSC (SRNS)
mode or Separate Reference Clock with SSC (SRIS) mode.
(Which is usually the case when using a real SoC as endpoint, e.g. the
RK3588 PCIe controller can run in both Root Complex and Endpoint mode.)

Add a rockchip specific property to enable/disable the rxX_cmn_refclk_mode
per lane. (Since this PHY supports bifurcation.)

Signed-off-by: Niklas Cassel <cassel@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240412125818.17052-2-cassel@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-13 11:36:15 +05:30
Sebastian Reichel
a75d8056e9 dt-bindings: phy: add rockchip usbdp combo phy document
Add device tree binding document for Rockchip USBDP Combo PHY
with Samsung IP block.

Co-developed-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240408225109.128953-2-sebastian.reichel@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-12 16:59:26 +05:30
Daniel Golle
f482f76c9d dt-bindings: phy: mediatek,mt7988-xfi-tphy: add new bindings
Add bindings for the MediaTek XFI Ethernet SerDes T-PHY found in the
MediaTek MT7988 SoC which can operate at various interfaces modes:

via USXGMII PCS:
 * USXGMII
 * 10GBase-R
 * 5GBase-R

via LynxI SGMII PCS:
 * 2500Base-X
 * 1000Base-X
 * Cisco SGMII (MAC side)

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Link: https://lore.kernel.org/r/da5498096f71a40ca1eac4124b7bb601c82396fb.1712625857.git.daniel@makrotopia.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-12 16:52:56 +05:30
Peter Griffin
724e4fc053 dt-bindings: phy: samsung,ufs-phy: Add dedicated gs101-ufs-phy compatible
Update dt schema to include the gs101 ufs phy compatible.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240404122559.898930-5-peter.griffin@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-06 14:27:17 +05:30
Danila Tikhonov
7c1f42967b dt-bindings: phy: qmp-ufs: Fix PHY clocks for SC7180
QMP UFS PHY used in SC7180 requires 3 clocks:

* ref - 19.2MHz reference clock from RPMh
* ref_aux - Auxiliary reference clock from GCC
* qref - QREF clock from GCC

This change obviously breaks the ABI, but it is inevitable since the
clock topology needs to be accurately described in the binding.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20240401182240.55282-2-danila@jiaxyga.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-06 12:50:16 +05:30
Neil Armstrong
72bea132f3 dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: document PHY AUX clock on SM8[456]50 SoCs
The PCIe Gen4x2 PHY found in the SM8[456]50 SoCs have a second clock named
"PHY_AUX_CLK" which is an input of the Global Clock Controller (GCC) which
is muxed & gated then returned to the PHY as an input.

Document the clock IDs to select the PIPE clock or the AUX clock,
also enforce a second clock-output-names and a #clock-cells value of 1
for the PCIe Gen4x2 PHY found in the SM8[456]50 SoCs.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240322-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v2-1-3ec0a966d52f@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-05 22:34:00 +05:30
Gatien Chevallier
02ec75edaa dt-bindings: treewide: add access-controllers description
access-controllers is an optional property that allows a peripheral to
refer to one or more domain access controller(s).

Description of this property is added to all peripheral binding files of
the peripheral under the STM32 firewall controller. It allows an accurate
representation of the hardware, where various peripherals are connected
to a firewall bus. The firewall can then check the peripheral accesses
before allowing its device to probe.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-04-05 14:39:10 +02:00
Danila Tikhonov
5787731c74 dt-bindings: phy: Add QMP UFS PHY comptible for SM8475
Document the QMP UFS PHY compatible for SM8475.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240327180642.20146-2-danila@jiaxyga.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-03-29 22:20:24 +05:30
Abel Vesa
5d56078613 dt-bindings: phy: qcom-edp: Add X1E80100 PHY compatibles
The Qualcomm X1E80100 platform has multiple PHYs that can work in both
eDP or DP mode, so document their compatible.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240221-phy-qualcomm-edp-x1e80100-v4-1-4e5018877bee@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-03-29 00:42:53 +05:30
Abel Vesa
f8d27a7e0a dt-bindings: phy: qcom,snps-eusb2-repeater: Add compatible for SMB2360
Add a dt-bindings compatible string for the Qualcomm's SMB2360 PMIC.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240220-phy-qualcomm-eusb2-repeater-smb2360-v2-1-213338ca1d5f@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-03-29 00:41:49 +05:30