Add Epoch Subsystem (EPSS) L3 provider support on SA8775P SoCs.
Current interconnect framework is based on static IDs for creating node
and registering with framework. This becomes a limitation for topologies
where there are multiple instances of same interconnect provider.
Modified interconnect framework APIs to create and link icc node with
dynamic IDs, this will help to overcome the dependency on static IDs.
* icc-sa8775p
dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P
interconnect: core: Add dynamic id allocation support
interconnect: qcom: Add multidev EPSS L3 support
interconnect: qcom: icc-rpmh: Add dynamic icc node id support
interconnect: qcom: sa8775p: Add dynamic icc node id support
Link: https://lore.kernel.org/r/20250415095343.32125-1-quic_rlaggysh@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
DTS example in the bindings should be indented with 2- or 4-spaces and
aligned with opening '- |', so correct any differences like 3-spaces or
mixtures 2- and 4-spaces in one binding. While re-indenting, drop
unused labels.
No functional changes here, but saves some comments during reviews of
new patches built on existing code.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250324125302.82167-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Add Epoch Subsystem (EPSS) L3 interconnect provider binding on
SA8775P SoCs.
The L3 instance on the SA8775P SoC is similar to those on SoCs
like SM8250 and SC7280. These SoCs use the PERF register instead
of L3_REG for programming the performance level, which is managed
in the data associated with the target-specific compatibles.
Since the hardware remains the same across all EPSS-supporting SoCs,
the generic compatible is retained for all SoCs.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Link: https://lore.kernel.org/r/20250415095343.32125-2-quic_rlaggysh@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Add interconnect support for SM8750 SoC.
The Qualcomm Technologies, Inc. SM8750 SoC is the latest in the line of
consumer mobile device SoCs.
* icc-sm8750
dt-bindings: interconnect: add interconnect bindings for SM8750
interconnect: qcom: Add interconnect provider driver for SM8750
interconnect: sm8750: Add missing const to static qcom_icc_desc
Link: https://lore.kernel.org/r/20241204-sm8750_master_interconnects-v3-0-3d9aad4200e9@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
This series introduce new ICC drivers for some legacy socs
while at it also updates a bit of qcs404 driver which seems
to not receive much attention lately.
* icc-misc
dt-bindings: interconnect: qcom: Add Qualcomm MSM8976 NoC
interconnect: qcom: Add MSM8976 interconnect provider driver
dt-bindings: interconnect: qcom: Add Qualcomm MSM8937 NoC
interconnect: qcom: Add MSM8937 interconnect provider driver
interconnect: qcom: qcs404: Mark AP-owned nodes as such
interconnect: qcom: qcs404: Add regmaps and more bus descriptions
dt-bindings: interconnect: qcom: msm8939: Fix example
interconnect: qcom: msm8953: Add ab_coeff
dt-bindings: interconnect: qcom: msm8953: Fix 'See also' in description
Link: https://lore.kernel.org/all/20240709102728.15349-1-a39.skl@gmail.com/
Signed-off-by: Georgi Djakov <djakov@kernel.org>
The virtual interconnect providers do not have their own IO address space,
but this is not documented in the DT schema and the following warnings are
reported by dtbs_check:
sc8180x-lenovo-flex-5g.dtb: interconnect-camnoc-virt: 'reg' is a required property
sc8180x-lenovo-flex-5g.dtb: interconnect-mc-virt: 'reg' is a required property
sc8180x-lenovo-flex-5g.dtb: interconnect-qup-virt: 'reg' is a required property
sc8180x-primus.dtb: interconnect-camnoc-virt: 'reg' is a required property
sc8180x-primus.dtb: interconnect-mc-virt: 'reg' is a required property
sc8180x-primus.dtb: interconnect-qup-virt: 'reg' is a required property
Fix this by adding them to the list of compatibles that do not require
the reg property.
Link: https://lore.kernel.org/r/20240730141016.1142608-1-djakov@kernel.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Pull char / misc and other driver updates from Greg KH:
"Here is the "big" set of char/misc and other driver subsystem changes
for 6.11-rc1. Nothing major in here, just loads of new drivers and
updates. Included in here are:
- IIO api updates and new drivers added
- wait_interruptable_timeout() api cleanups for some drivers
- MODULE_DESCRIPTION() additions for loads of drivers
- parport out-of-bounds fix
- interconnect driver updates and additions
- mhi driver updates and additions
- w1 driver fixes
- binder speedups and fixes
- eeprom driver updates
- coresight driver updates
- counter driver update
- new misc driver additions
- other minor api updates
All of these, EXCEPT for the final Kconfig build fix for 32bit
systems, have been in linux-next for a while with no reported issues.
The Kconfig fixup went in 29 hours ago, so might have missed the
latest linux-next, but was acked by everyone involved"
* tag 'char-misc-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (330 commits)
misc: Kconfig: exclude mrvl-cn10k-dpi compilation for 32-bit systems
misc: delete Makefile.rej
binder: fix hang of unregistered readers
misc: Kconfig: add a new dependency for MARVELL_CN10K_DPI
virtio: add missing MODULE_DESCRIPTION() macro
agp: uninorth: add missing MODULE_DESCRIPTION() macro
spmi: add missing MODULE_DESCRIPTION() macros
dev/parport: fix the array out-of-bounds risk
samples: configfs: add missing MODULE_DESCRIPTION() macro
misc: mrvl-cn10k-dpi: add Octeon CN10K DPI administrative driver
misc: keba: Fix missing AUXILIARY_BUS dependency
slimbus: Fix struct and documentation alignment in stream.c
MAINTAINERS: CC dri-devel list on Qualcomm FastRPC patches
misc: fastrpc: use coherent pool for untranslated Compute Banks
misc: fastrpc: support complete DMA pool access to the DSP
misc: fastrpc: add missing MODULE_DESCRIPTION() macro
misc: fastrpc: Add missing dev_err newlines
misc: fastrpc: Use memdup_user()
nvmem: core: Implement force_ro sysfs attribute
nvmem: Use sysfs_emit() for type attribute
...
This series adds QoS support for QNOC type device which can be found on
SC7280 platform. It adds support for programming priority,
priority forward disable and urgency forwarding. This helps in
priortizing the traffic originating from different interconnect masters
at NOC (Network On Chip).
* icc-rpmh-qos
dt-bindings: interconnect: add clock property to enable QOS on SC7280
interconnect: qcom: icc-rpmh: Add QoS configuration support
interconnect: qcom: sc7280: enable QoS configuration
interconnect: qcom: Fix DT backwards compatibility for QoS
Link: https://lore.kernel.org/r/20240607173927.26321-1-quic_okukatla@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Add bindings for the MediaTek External Memory Interface Interconnect,
which providers support system bandwidth requirements through Dynamic
Voltage Frequency Scaling Resource Collector (DVFSRC) hardware.
This adds bindings for MediaTek MT8183 and MT8195 SoCs.
Note that this is modeled as a subnode of DVFSRC for multiple reasons:
- Some SoCs have more than one interconnect on the DVFSRC (and two
different kinds of EMI interconnect, and also a SMI interconnect);
- Some boards will want to not enable the interconnect driver because
some of those are not battery powered (so they just keep the knobs
at full thrust from the bootloader and never care scaling busses);
- Some DVFSRC interconnect features may depend on firmware.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240610085735.147134-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
* icc-x1e80100
dt-bindings: interconnect: document the RPMh Network-On-Chip Interconnect in Qualcomm SM8650 SoC
interconnect: qcom: introduce RPMh Network-On-Chip Interconnect on SM8650 SoC
dt-bindings: interconnect: qcom-bwmon: document SM8650 BWMONs
This series adds interconnect support for the Qualcomm X1E80100 platform,
aka Snapdragon X Elite.
Our v1 post of the patchsets adding support for Snapdragon X Elite SoC had
the part number sc8380xp which is now updated to the new part number x1e80100
based on the new branding scheme and refers to the exact same SoC.
Release Link: https://www.qualcomm.com/news/releases/2023/10/qualcomm-unleashes-snapdragon-x-elite--the-ai-super-charged-plat
Link: https://lore.kernel.org/r/20231123135028.29433-1-quic_sibis@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
* icc-misc
interconnect: imx: Replace custom implementation of COUNT_ARGS()
interconnect: msm8974: Replace custom implementation of COUNT_ARGS()
interconnect: qcom: osm-l3: Replace custom implementation of COUNT_ARGS()
interconnect: fix error handling in qnoc_probe()
interconnect: imx: Replace inclusion of kernel.h in the header
dt-bindings: interconnect: qcom,rpmh: do not require reg on SDX65 MC virt
Signed-off-by: Georgi Djakov <djakov@kernel.org>
