Shubhrajyoti Datta a1f310511c clk: clocking-wizard: Fix output clock register offset for Versal platforms ...

[ Upstream commit 7c2e86f7b5 ]

The output clock register offset used in clk_wzrd_register_output_clocks
was incorrectly referencing 0x3C instead of 0x38, which caused
misconfiguration of output dividers on Versal platforms.

Correcting the off-by-one error ensures proper configuration of output
clocks.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

2025-11-13 15:34:34 -05:00

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clk-xlnx-clock-wizard.c

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Kconfig

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Makefile

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xlnx_vcu.c

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