Wayne Chang 40a753a906 phy: tegra: xusb: Explicitly configure HS_DISCON_LEVEL to 0x7 ...

commit b246caa680 upstream.

The USB2 Bias Pad Control register manages analog parameters for signal
detection. Previously, the HS_DISCON_LEVEL relied on hardware reset
values, which may lead to the detection failure.

Explicitly configure HS_DISCON_LEVEL to 0x7. This ensures the disconnect
threshold is sufficient to guarantee reliable detection.

Fixes: bbf711682c ("phy: tegra: xusb: Add Tegra186 support")
Cc: stable@vger.kernel.org
Signed-off-by: Wayne Chang <waynec@nvidia.com>
Link: https://patch.msgid.link/20251212032116.768307-1-waynec@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2026-01-23 11:18:44 +01:00

..

Kconfig

…

Makefile

…

phy-tegra194-p2u.c

…

xusb-tegra124.c

…

xusb-tegra186.c

phy: tegra: xusb: Explicitly configure HS_DISCON_LEVEL to 0x7

2026-01-23 11:18:44 +01:00

xusb-tegra210.c

phy: tegra: xusb: fix device and OF node leak at probe

2025-09-19 16:35:51 +02:00

xusb.c

…

xusb.h

phy: tegra: xusb: Decouple CYA_TRK_CODE_UPDATE_ON_IDLE from trk_hw_mode

2025-07-24 08:56:20 +02:00