mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2026-07-25 16:19:48 +02:00
Jiaxun YangandGreg Kroah-Hartman
988a03e31e
[ Upstream commit beb2800074 ]
Currently kernel entry in head.S is in DMW address range, firmware is
instructed to jump to this address after loading the kernel image.
However kernel should not make any assumption on firmware's DMW
setting, thus the entry point should be a physical address falls into
direct translation region.
Fix by converting entry address to physical and amend entry calculation
logic in libstub accordingly.
BTW, use ABSOLUTE() to calculate variables to make Clang/LLVM happy.
Cc: stable@vger.kernel.org
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Sasha Levin <sashal@kernel.org>
167 lines
3.0 KiB
ArmAsm
167 lines
3.0 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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#include <linux/sizes.h>
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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#define PAGE_SIZE _PAGE_SIZE
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#define RO_EXCEPTION_TABLE_ALIGN 4
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#define PHYSADDR_MASK 0xffffffffffff /* 48-bit */
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/*
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* Put .bss..swapper_pg_dir as the first thing in .bss. This will
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* ensure that it has .bss alignment (64K).
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*/
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#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
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#include <asm-generic/vmlinux.lds.h>
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#include "image-vars.h"
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/*
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* Max avaliable Page Size is 64K, so we set SectionAlignment
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* field of EFI application to 64K.
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*/
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PECOFF_FILE_ALIGN = 0x200;
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PECOFF_SEGMENT_ALIGN = 0x10000;
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OUTPUT_ARCH(loongarch)
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ENTRY(kernel_entry)
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PHDRS {
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text PT_LOAD FLAGS(7); /* RWX */
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note PT_NOTE FLAGS(4); /* R__ */
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}
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jiffies = jiffies_64;
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SECTIONS
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{
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. = VMLINUX_LOAD_ADDRESS;
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_text = .;
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HEAD_TEXT_SECTION
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. = ALIGN(PECOFF_SEGMENT_ALIGN);
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_stext = .;
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.text : {
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TEXT_TEXT
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SCHED_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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IRQENTRY_TEXT
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SOFTIRQENTRY_TEXT
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*(.fixup)
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*(.gnu.warning)
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} :text = 0
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. = ALIGN(PECOFF_SEGMENT_ALIGN);
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_etext = .;
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. = ALIGN(PECOFF_SEGMENT_ALIGN);
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__init_begin = .;
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__inittext_begin = .;
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INIT_TEXT_SECTION(PAGE_SIZE)
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.exit.text : {
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EXIT_TEXT
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}
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. = ALIGN(PECOFF_SEGMENT_ALIGN);
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__inittext_end = .;
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__initdata_begin = .;
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/*
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* struct alt_inst entries. From the header (alternative.h):
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* "Alternative instructions for different CPU types or capabilities"
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* Think locking instructions on spinlocks.
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*/
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. = ALIGN(4);
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.altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
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__alt_instructions = .;
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*(.altinstructions)
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__alt_instructions_end = .;
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}
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INIT_DATA_SECTION(16)
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.exit.data : {
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EXIT_DATA
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}
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#ifdef CONFIG_SMP
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PERCPU_SECTION(1 << CONFIG_L1_CACHE_SHIFT)
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#endif
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.init.bss : {
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*(.init.bss)
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}
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. = ALIGN(PECOFF_SEGMENT_ALIGN);
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__initdata_end = .;
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__init_end = .;
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_sdata = .;
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RO_DATA(4096)
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.got : ALIGN(16) { *(.got) }
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.plt : ALIGN(16) { *(.plt) }
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.got.plt : ALIGN(16) { *(.got.plt) }
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RW_DATA(1 << CONFIG_L1_CACHE_SHIFT, PAGE_SIZE, THREAD_SIZE)
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.rela.dyn : ALIGN(8) {
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__rela_dyn_begin = .;
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*(.rela.dyn) *(.rela*)
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__rela_dyn_end = .;
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}
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.data.rel : { *(.data.rel*) }
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#ifdef CONFIG_RELOCATABLE
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. = ALIGN(8);
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.la_abs : AT(ADDR(.la_abs) - LOAD_OFFSET) {
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__la_abs_begin = .;
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*(.la_abs)
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__la_abs_end = .;
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}
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#endif
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.sdata : {
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*(.sdata)
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}
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.edata_padding : { BYTE(0); . = ALIGN(PECOFF_FILE_ALIGN); }
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_edata = .;
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BSS_SECTION(0, SZ_64K, 8)
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. = ALIGN(PECOFF_SEGMENT_ALIGN);
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_end = .;
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STABS_DEBUG
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DWARF_DEBUG
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ELF_DETAILS
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#ifdef CONFIG_EFI_STUB
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/* header symbols */
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_kernel_entry = ABSOLUTE(kernel_entry & PHYSADDR_MASK);
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_kernel_asize = ABSOLUTE(_end - _text);
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_kernel_fsize = ABSOLUTE(_edata - _text);
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_kernel_vsize = ABSOLUTE(_end - __initdata_begin);
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_kernel_rsize = ABSOLUTE(_edata - __initdata_begin);
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#endif
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.gptab.sdata : {
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*(.gptab.data)
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*(.gptab.sdata)
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}
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.gptab.sbss : {
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*(.gptab.bss)
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*(.gptab.sbss)
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}
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DISCARDS
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/DISCARD/ : {
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*(.dynamic .dynsym .dynstr .hash .gnu.hash)
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*(.gnu.attributes)
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*(.options)
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*(.eh_frame)
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}
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}
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