Sebastian ReichelandGreg Kroah-Hartman bd588d5256 clk: rockchip: fix error for unknown clocks ...

commit 12fd64baba upstream.

There is a clk == NULL check after the switch to check for
unsupported clk types. Since clk is re-assigned in a loop,
this check is useless right now for anything but the first
round. Let's fix this up by assigning clk = NULL in the
loop before the switch statement.

Fixes: a245fecbb8 ("clk: rockchip: add basic infrastructure for clock branches")
Cc: stable@vger.kernel.org
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
[added fixes + stable-cc]
Link: https://lore.kernel.org/r/20240325193609.237182-6-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2024-10-10 11:57:54 +02:00

..

clk-cpu.c

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clk-ddr.c

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clk-half-divider.c

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clk-inverter.c

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clk-mmc-phase.c

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clk-muxgrf.c

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clk-pll.c

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clk-px30.c

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clk-rk3036.c

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clk-rk3128.c

clk: rockchip: rk3128: Fix HCLK_OTG gate register

2024-01-20 11:51:42 +01:00

clk-rk3188.c

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clk-rk3228.c

clk: rockchip: Set parent rate for DCLK_VOP clock on RK3228

2024-10-04 16:29:26 +02:00

clk-rk3288.c

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clk-rk3308.c

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clk-rk3328.c

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clk-rk3368.c

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clk-rk3399.c

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clk-rk3568.c

clk: rockchip: rk3568: Add PLL rate for 292.5MHz

2024-01-20 11:51:42 +01:00

clk-rk3588.c

clk: rockchip: rk3588: Fix 32k clock name for pmu_24m_32k_100m_src_p

2024-10-04 16:29:32 +02:00

clk-rv1108.c

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clk-rv1126.c

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clk.c

clk: rockchip: fix error for unknown clocks

2024-10-10 11:57:54 +02:00

clk.h

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Kconfig

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Makefile

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rst-rk3588.c

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softrst.c

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