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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2026-08-09 06:14:34 +02:00
Stefan Dösinger
7d1f68e87b
This adds base DT definition for zx297520v3 and one board that consumes it. The stock kernel does not use the armv7 timer, but it seems to work fine. The board has other board-specific timers that would need a driver and I see no reason to bother with them since the arm standard timer works. The caveat is the non-standard GIC setup needed to handle the timer's level-low PPI. This is the responsibility of the boot loader and documented in Documentation/arch/arm/zte/zx297520v3.rst. Reviewed-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Stefan Dösinger <stefandoesinger@gmail.com> --- Changes in v8: Remove redundant label, use "arm,pl011" for uart0 and 2 too. v6: Squash board + timer + uart patches into one v5: Prepend the SoC name in the device specific DTS filename. v4: Declare all uarts Remove the UART aliases for now. I can revisit this when I get my hands on a board that exposes two UARTs.
43 lines
819 B
Makefile
43 lines
819 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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subdir-y += actions
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subdir-y += airoha
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subdir-y += allwinner
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subdir-y += alphascale
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subdir-y += amazon
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subdir-y += amlogic
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subdir-y += arm
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subdir-y += aspeed
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subdir-y += axis
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subdir-y += broadcom
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subdir-y += calxeda
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subdir-y += cirrus
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subdir-y += cnxt
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subdir-y += gemini
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subdir-y += hisilicon
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subdir-y += hpe
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subdir-y += intel
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subdir-y += marvell
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subdir-y += mediatek
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subdir-y += microchip
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subdir-y += moxa
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subdir-y += nspire
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subdir-y += nuvoton
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subdir-y += nvidia
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subdir-y += nxp
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subdir-y += qcom
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subdir-y += realtek
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subdir-y += renesas
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subdir-y += rockchip
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subdir-y += samsung
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subdir-y += sigmastar
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subdir-y += socionext
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subdir-y += st
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subdir-y += sunplus
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subdir-y += synaptics
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subdir-y += ti
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subdir-y += unisoc
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subdir-y += vt8500
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subdir-y += xen
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subdir-y += xilinx
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subdir-y += zte
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