mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2026-08-09 06:14:34 +02:00
Tiezhu YangandHuacai Chen
7b5944d6ed
Like other architectures such as x86, arm64, riscv, powerpc and s390, select THREAD_INFO_IN_TASK for LoongArch to move thread_info off the stack into task_struct. This follows modern kernel standards and also makes the system more secure. With this patch, thread_info is included in task_struct at an offset of 0 instead of being placed at the bottom of the kernel stack. Thus, the $tp register points to both thread_info and task_struct. To support this, introduce a per-CPU variable cpu_tasks to store the pointer to the current task_struct. This decouples the recovery of the $tp register from the stack pointer during exception entry. Then initialize cpu_tasks for the primary and secondary CPUs during arch-specific setup and SMP boot paths. To eliminate the dangerous windows during the early initialization where the cpu_tasks remains uninitialized, set_current() is invoked as early as possible in both setup_arch() and start_secondary(). This ensures the $tp recovery barrier is armed in case any early boot exceptions or kernel panics occur. Modify SAVE_SOME and handle_syscall to restore the $tp register from cpu_tasks, and also use the la_abs absolute addressing for cpu_tasks access in assembly to bypass the relocation limits within exception handling sections. By advancing the preservation of u0 in SAVE_SOME, we reuse the PERCPU_BASE_KS value in u0 for the cpu_tasks calculation, effectively eliminating a duplicate csrrd instruction execution on SMP platforms. Update <asm/switch_to.h> and <kernel/switch.S> to fully support the CONFIG_THREAD_INFO_IN_TASK feature. Remove the obsolete next_ti argument from __switch_to(), which shifts the remaining arguments ahead in the calling convention (sched_ra from a3 to a2, and sched_cfa from a4 to a3). Under the new configuration, __switch_to() now directly derives the thread pointer ($tp) from the next task_struct pointer in a1. To preserve the optimal and clean "move tp, a1" path for 64-bit kernels, the thread pointer ($tp) is assigned directly from a1 in the core path. For 32-bit kernels, where a1 carries a 2000-byte structural pointer bias at entry, an explicit adjustment "PTR_ADDI tp, tp, -TASK_STRUCT_OFFSET" is introduced at the function exit. In the context of __switch_to(), local interrupts are disabled, and the kernel is in a critical switching phase where handling any synchronous exception is practically impossible and prohibited. If any synchronous exception or watchpoint does trigger in this narrow window, it constitutes a fatal double fault and the kernel is expected to die/panic immediately anyway. Therefore, the temporary biased value in $tp is safe and acceptable here. Additionally, evaluate the stack lookup as a single load instruction "LONG_LPTR t0, a1, (TASK_STACK - TASK_STRUCT_OFFSET)", this perfectly satisfies both 32-bit and 64-bit kernels. Using the "next" pointer in a1 as the base register, rather than $tp, effectively unchains the data dependency (RAW hazard) from the preceding move instruction, maximizing the instruction-level parallelism and superscalar execution efficiency while naturally adapting the structural shift. With CONFIG_THREAD_INFO_IN_TASK enabled, the kernel stack life cycle is decoupled from task_struct and can be freed concurrently. Currently, show_stacktrace() reads raw stack data via __get_addr() and subsequently calls show_backtrace() to unwind the frame, without holding any reference to the target task's stack. If show_stacktrace() is called on a concurrently exiting task, it could attempt to read from a freed or reallocated kernel stack. This introduces a severe use-after-free (UAF) read risk or kernel panics. Wrap the entire stack inspection process inside show_stacktrace() with a try_get_task_stack() and put_task_stack() pair. This ensures the task stack remains pinned safely during both the raw stack data dump loop and the subsequent stack unwinding phase. Also, ensure that the task pointer is initialized to "current" early if it is NULL, so that try_get_task_stack() always operates on a valid task reference. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
97 lines
3.1 KiB
C
97 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* thread_info.h: LoongArch low-level thread information
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*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#ifndef _ASM_THREAD_INFO_H
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#define _ASM_THREAD_INFO_H
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#ifdef __KERNEL__
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#ifndef __ASSEMBLER__
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#include <asm/processor.h>
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/*
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* low level task data that entry.S needs immediate access to
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* - this struct should fit entirely inside of one cache line
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* - this struct shares the supervisor stack pages
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* - if the contents of this structure are changed, the assembly constants
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* must also be changed
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*/
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struct thread_info {
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unsigned long flags; /* low level flags */
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unsigned long tp_value; /* thread pointer */
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__u32 cpu; /* current CPU */
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int preempt_count; /* 0 => preemptible, <0 => BUG */
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struct pt_regs *regs;
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unsigned long syscall; /* syscall number */
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unsigned long syscall_work; /* SYSCALL_WORK_ flags */
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};
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/*
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* macros/functions for gaining access to the thread information structure
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*/
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#define INIT_THREAD_INFO(tsk) \
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{ \
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.flags = _TIF_FIXADE, \
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.cpu = 0, \
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.preempt_count = INIT_PREEMPT_COUNT, \
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}
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register unsigned long current_stack_pointer __asm__("$sp");
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#endif /* !__ASSEMBLER__ */
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/* thread information allocation */
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#define THREAD_SIZE SZ_16K
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#define THREAD_MASK (THREAD_SIZE - 1UL)
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#define THREAD_SIZE_ORDER ilog2(THREAD_SIZE / PAGE_SIZE)
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/*
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* thread information flags
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* - these are process state flags that various assembly files may need to
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* access
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* - pending work-to-be-done flags are in LSW
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* - other flags in MSW
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*
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* Tell the generic TIF infrastructure which special bits loongarch supports
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*/
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#define HAVE_TIF_NEED_RESCHED_LAZY
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#define HAVE_TIF_RESTORE_SIGMASK
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#include <asm-generic/thread_info_tif.h>
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/* Architecture specific bits */
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#define TIF_NOHZ 16 /* in adaptive nohz mode */
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#define TIF_USEDFPU 17 /* FPU was used by this task this quantum (SMP) */
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#define TIF_USEDSIMD 18 /* SIMD has been used this quantum */
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#define TIF_FIXADE 19 /* Fix address errors in software */
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#define TIF_LOGADE 20 /* Log address errors to syslog */
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#define TIF_32BIT_REGS 21 /* 32-bit general purpose registers */
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#define TIF_32BIT_ADDR 22 /* 32-bit address space */
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#define TIF_LOAD_WATCH 23 /* If set, load watch registers */
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#define TIF_SINGLESTEP 24 /* Single Step */
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#define TIF_LSX_CTX_LIVE 25 /* LSX context must be preserved */
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#define TIF_LASX_CTX_LIVE 26 /* LASX context must be preserved */
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#define TIF_USEDLBT 27 /* LBT was used by this task this quantum (SMP) */
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#define TIF_LBT_CTX_LIVE 28 /* LBT context must be preserved */
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#define _TIF_NOHZ BIT(TIF_NOHZ)
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#define _TIF_USEDFPU BIT(TIF_USEDFPU)
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#define _TIF_USEDSIMD BIT(TIF_USEDSIMD)
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#define _TIF_FIXADE BIT(TIF_FIXADE)
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#define _TIF_LOGADE BIT(TIF_LOGADE)
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#define _TIF_32BIT_REGS BIT(TIF_32BIT_REGS)
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#define _TIF_32BIT_ADDR BIT(TIF_32BIT_ADDR)
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#define _TIF_LOAD_WATCH BIT(TIF_LOAD_WATCH)
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#define _TIF_SINGLESTEP BIT(TIF_SINGLESTEP)
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#define _TIF_LSX_CTX_LIVE BIT(TIF_LSX_CTX_LIVE)
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#define _TIF_LASX_CTX_LIVE BIT(TIF_LASX_CTX_LIVE)
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#define _TIF_USEDLBT BIT(TIF_USEDLBT)
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#define _TIF_LBT_CTX_LIVE BIT(TIF_LBT_CTX_LIVE)
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#endif /* __KERNEL__ */
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#endif /* _ASM_THREAD_INFO_H */
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