Qingfang DengandThomas Bogendoerfer 1dc85756b7 MIPS: ralink: reduce ARCH_DMA_MINALIGN ...

Currently, Ralink SoCs use the default ARCH_DMA_MINALIGN value of 128
bytes defined in mach-generic. This is excessive for these platforms
and leads to significant memory waste in kmalloc.

Override ARCH_DMA_MINALIGN to use L1_CACHE_BYTES, which is 16 bytes for
RT288X and 32 bytes for other Ralink SoCs.

Signed-off-by: Qingfang Deng <qingfang.deng@linux.dev>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

2026-05-26 16:35:37 +02:00

..

mt7620

MIPS: Remove TX39XX support

2022-03-01 10:07:22 +01:00

mt7621

MIPS: Remove TX39XX support

2022-03-01 10:07:22 +01:00

rt288x

MIPS: Remove TX39XX support

2022-03-01 10:07:22 +01:00

rt305x

MIPS: Remove TX39XX support

2022-03-01 10:07:22 +01:00

rt3883

MIPS: Remove TX39XX support

2022-03-01 10:07:22 +01:00

irq.h

…

kmalloc.h

MIPS: ralink: reduce ARCH_DMA_MINALIGN

2026-05-26 16:35:37 +02:00

mt7620.h

mips: ralink: mt7620: remove clock related code

2023-06-21 14:50:23 +02:00

mt7621.h

mips: ralink: mt7621: define MT7621_SYSC_BASE with __iomem

2022-12-01 13:32:42 +01:00

ralink_regs.h

…

rt288x.h

mips: ralink: rt288x: remove clock related code

2023-06-21 14:50:22 +02:00

rt305x.h

mips: ralink: rt305x: remove clock related code

2023-06-21 14:50:22 +02:00

rt3883.h

mips: ralink: rt3883: remove clock related code

2023-06-21 14:50:22 +02:00

spaces.h

mips: fix PCI_IOBASE definition

2025-03-18 22:42:42 +01:00