mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2026-08-09 06:14:34 +02:00
Linus Torvalds
c98d767b34
Pull kvm updates from Paolo Bonzini:
"arm64:
This is a bit of an odd merge window on the KVM/arm64 front. There
is absolutely no new feature in the pull request. It is purely
fixes, because it is simply becoming too hard to review new stuff
when so many AI-fuelled fixes hit the list.
- Significant cleanup of the vgic-v5 PPI support which was merged in
7.1. This makes the code more maintainable, and squashes a couple
of bugs in the meantime
- Set of fixes for the handling of the MMU in an NV context,
particularly VNCR-triggered faults. S1POE support is fixed as well
- Large set of pKVM fixes, mostly addressing recurring issues around
hypervisor tracking of donated pages in obscure cases where the
donation could fail and leave things in a bizarre state
- Fixes for the so-called "lazy vgic init", which resulted in
sleeping operations in non-preemptible sections. This turned out to
be far more invasive than initially expected..
- Reduce the overhead of L1/L2 context switch by not touching the FP
registers
- Fix the way non-implemented page sizes are dealt with when a guest
insist on using them for S2 translation
- The usual set of low-impact fixes and cleanups all over the map
Loongarch:
- On a request for lazy FPU load, load all FPU state that the VM
supports instead of enabling only the part (FPU, LSX or LASX) that
caused the FPU load request
- Some enhancements about interrupt injection
- Some bug fixes and other small changes
RISC-V:
- Batch G-stage TLB flushes for GPA range based page table updates
- Convert HGEI line management to fully per-HART
- Fix missing CSR dirty marking when FWFT state updated via ONE_REG
- Fix stale FWFT feature exposure to Guest/VM
- Speed up dirty logging write faults using MMU rwlock and atomic PTE
updates using cmpxchg() for permission-only changes
- Use flexible array for APLIC IRQ state
- Use kvm_slot_dirty_track_enabled() for logging enable check on a
memslot
- Avoid skipping valid pages in kvm_riscv_gstage_wp_range()
- Avoid skipping valid pages in kvm_riscv_gstage_unmap_range()
- Use endian-specific __lelong for NACL shared memory
S390:
- KVM_PRE_FAULT_MEMORY support
- Support for 2G hugepages
- Support for the ASTFLEIE 2 facility
- Support for fast inject using kvm_arch_set_irq_inatomic
- Fix potential leak of uninitialized bytes
- A few more misc gmap fixes
x86:
- Generic support for the more granular permissions allowed by EPT,
namely "read" (which was previously usurping the U bit) and
separate execution bits for kernel and userspace
- Do not assume that all page tables start with U=1/W=1/NX=0 at the
root, as AMD GMET needs to have U=0 at the root
- Introduce common assembly macros for use within Intel and AMD
vendor-specific vmentry code. This touches the SPEC_CTRL handling,
which is now entirely done in assembly for Intel (by reusing the
AMD code that already existed), and register save/restore which
uses some macro magic to compute the offsets in the struct. Both of
these are preparatory changes for upcoming APX support
- Clean up KVM's register tracking and storage, primarily to prepare
for APX support, which expands the maximum number of GPRs from 16
to 32
- Keep a single copy of the PDPTRs rather than two, since
architecturally there is just one
- Handle EXIT_FASTPATH_EXIT_USERSPACE in vendor code to ensure vendor
code gets a chance to handle things like reaping the PML buffer
- Update KVM's view of PV async enabling if and only if the MSR write
fully succeeds
- Fix a variety of issues where the emulator doesn't honor
guest-debug state, and clean up related code along the way
- Synthesize EPT Violation and #NPF "error code" bits when injecting
faults into L1 that didn't originate in hardware (in which case the
VMCS/VMCB doesn't hold relevant information)
- Add support for virtualizing (well, emulating) AMD's flavor of
CPL>0 CPUID faulting
- Clean up the GPR APIs so that KVM's use of "raw" is consistent, and
fix a variety of minor bugs along the way
- Fix an OOB memory access due to not checking the VP ID when
handling a Hyper-V PV TLB flush for L2
- Fix a bug in the mediated PMU's handling of fixed counters that
allowed the guest to bypass the PMU event filter
- Allow userspace to return EAGAIN when handling SNP and TDX
hypercalls, so the KVM can forward a "retry" status code to the
guest, and reserve all unused error codes for future usage
- Overhaul the TDP MMU => S-EPT code to move as much S-EPT specific
logic as possible into the TDX code, and to funnel (almost) all
S-EPT updates into a single chokepoint. The motivation is largely
to prepare for upcoming Dynamic PAMT support, but the cleanups are
nice to have on their own
- Plug a hole in shadow page table handling, where KVM fails to
recursively zap nested EPT/NPT shadow page tables when the nested
hypervisor tears down its own EPT/NPT page tables from the bottom
up
x86 (Intel):
- Support for nested MBEC (Mode-Based Execute Control), see above in
the generic section; also run with MBEC enabled even for non-nested
mode
- Use the kernel's "enum pg_level" in the TDX APIs instead of the
TDX-Module's level definitions (which are 0-based)
- Rework the TDX memory APIs to not require/assume that guest memory
is backed by "struct page" (in prepartion for guest_memfd hugepage
support)
- Fix a largely benign bug where KVM TDX would incorrectly state it
could emulate several x2APIC MSRs
- Use the "safe" WRMSR API when proxying LBR MSR writes as the
to-be-written value is guest controlled and completely unvalidated
x86 (AMD):
- Support for nested GMET (Guest Mode Execution Trap), see above in
the generic section; also run with GMET enabled even for non-nested
mode
- Fixes and minor cleanups to GHCB handling, on top of the earlier
work already merged into 7.1-rc
- Ensure KVM's copy of CR0 and CR3 are up-to-date prior to invoking
fastpath handlers
- Add support for virtualizing gPAT (KVM previously just used L1's
PAT when running L2)
- Fix goofs where KVM mishandles side effects (e.g. single-step and
PMC updates) when emulating VMRUN
- Fix a variety of bugs in AVIC's handling of x2APIC MSR
interception, most notably where KVM didn't disable interception of
IRR, ISR, and TMR regs
- Add support for virtualizing Host-Only/Guest-Only bits in the
mediated PMU
- Don't advertise support for unusable VM types, and account for VM
types that are disabled by firmware, e.g. to mitigate security
vulnerabilities
- Rewrite the SEV {en,de}crypt debug ioctls as they were riddle with
bugs and unnecessarily complicated, and add comprehensive tests
- Clean up and deduplicate the SEV page pinning code
- Fix minor goofs related to writing back CPUID information after
firmware rejects a CPUID page for an SNP vCPU
Generic:
- Rename invalidate_begin() to invalidate_start() throughout KVM to
follow the kernel's nomenclature, e.g. for mmu_notifiers
- Use guard() to cleanup up various KVM+VFIO flows
- Minor cleanups
guest_memfd:
- Return -EEXIST instead of -EINVAL if userspace attempts to bind a
gmem range to multiple memslots, and fix the test that was supposed
to ensure KVM returns -EEXIST
- Treat memslot binding offsets and sizes as unsigned values to fix a
bug where KVM interprets a large "offset + size" as a negative
value and allows a nonsensical offset
- Use the inode number instead of the page offset for the NUMA
interleaving index to fix a bug where the effective index would
jump by two for consecutive pages (the caller also adds in the page
offset)
Selftests:
- Randomize the dirty log test's delay when reaping the bitmap on the
first pass, as always waiting only 1ms hid a KVM RISC-V bug as the
test reaped the bitmap before KVM could build up enough state to
hit the bug
- A pile of one-off fixes and cleanups"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (326 commits)
KVM: x86/mmu: Ensure hugepage is in by slot before checking max mapping level
KVM: x86: Fix shadow paging use-after-free due to unexpected role
KVM: s390: Introducing kvm_arch_set_irq_inatomic fast inject
KVM: s390: Enable adapter_indicators_set to use mapped pages
KVM: s390: Add map/unmap ioctl and clean mappings post-guest
riscv: kvm: Use endian-specific __lelong for NACL shared memory
KVM: selftests: access_tracking_perf_test: bump number of NUMA nodes to 32
KVM: s390: vsie: Implement ASTFLEIE facility 2
KVM: s390: vsie: Refactor handle_stfle
s390/sclp: Detect ASTFLEIE 2 facility
KVM: s390: Minor refactor of base/ext facility lists
KVM: x86/mmu: move pdptrs out of the MMU
KVM: x86: check that kvm_handle_invpcid is only invoked with shadow paging
KVM: nSVM: invalidate cached PDPTRs across nested NPT transitions
KVM: nVMX: remove unnecessary code in prepare_vmcs02_rare
KVM: x86: remove nested_mmu from mmu_is_nested()
KVM: arm64: vgic-its: Make ABI commit helpers return void
KVM: s390: Initialize KVM_S390_GET_CMMA_BITS memory
LoongArch: KVM: Add missing slots_lock for device register/unregister
LoongArch: KVM: Validate irqchip index in irqfd routing
...
206 lines
5.1 KiB
C
206 lines
5.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright IBM Corp. 2007
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*/
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#ifndef _ASM_S390_SCLP_H
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#define _ASM_S390_SCLP_H
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#include <linux/types.h>
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#define SCLP_CHP_INFO_MASK_SIZE 32
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#define EARLY_SCCB_SIZE PAGE_SIZE
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#define SCLP_MAX_CORES 512
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/* 144 + 16 * SCLP_MAX_CORES + 2 * (SCLP_MAX_CORES - 1) */
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#define EXT_SCCB_READ_SCP (3 * PAGE_SIZE)
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/* 24 + 16 * SCLP_MAX_CORES */
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#define EXT_SCCB_READ_CPU (3 * PAGE_SIZE)
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#define SCLP_ERRNOTIFY_AQ_RESET 0
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#define SCLP_ERRNOTIFY_AQ_REPAIR 1
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#define SCLP_ERRNOTIFY_AQ_INFO_LOG 2
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#define SCLP_ERRNOTIFY_AQ_OPTICS_DATA 3
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#define SCLP_ERRNOTIFY_AQ_NVME_SMART_LOG 4
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#ifndef __ASSEMBLER__
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#include <linux/uio.h>
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#include <asm/chpid.h>
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#include <asm/cpu.h>
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struct sclp_chp_info {
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u8 recognized[SCLP_CHP_INFO_MASK_SIZE];
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u8 standby[SCLP_CHP_INFO_MASK_SIZE];
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u8 configured[SCLP_CHP_INFO_MASK_SIZE];
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};
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#define LOADPARM_LEN 8
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struct sclp_ipl_info {
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int is_valid;
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int has_dump;
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char loadparm[LOADPARM_LEN];
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};
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struct sclp_core_entry {
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u8 core_id;
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u8 reserved0;
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u8 : 4;
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u8 sief2 : 1;
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u8 skey : 1;
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u8 : 2;
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u8 : 2;
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u8 gpere : 1;
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u8 siif : 1;
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u8 sigpif : 1;
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u8 : 3;
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u8 reserved2[3];
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u8 : 2;
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u8 ib : 1;
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u8 cei : 1;
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u8 : 4;
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u8 reserved3[6];
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u8 type;
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u8 reserved1;
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} __attribute__((packed));
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struct sclp_core_info {
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unsigned int configured;
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unsigned int standby;
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unsigned int combined;
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struct sclp_core_entry core[SCLP_MAX_CORES];
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};
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struct sclp_info {
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unsigned char has_linemode : 1;
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unsigned char has_vt220 : 1;
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unsigned char has_siif : 1;
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unsigned char has_sigpif : 1;
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unsigned char has_core_type : 1;
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unsigned char has_sprp : 1;
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unsigned char has_hvs : 1;
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unsigned char has_wti : 1;
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unsigned char has_esca : 1;
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unsigned char has_sief2 : 1;
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unsigned char has_64bscao : 1;
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unsigned char has_gpere : 1;
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unsigned char has_cmma : 1;
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unsigned char has_gsls : 1;
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unsigned char has_ib : 1;
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unsigned char has_cei : 1;
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unsigned char has_pfmfi : 1;
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unsigned char has_ibs : 1;
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unsigned char has_skey : 1;
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unsigned char has_kss : 1;
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unsigned char has_diag204_bif : 1;
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unsigned char has_gisaf : 1;
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unsigned char has_diag310 : 1;
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unsigned char has_diag318 : 1;
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unsigned char has_diag320 : 1;
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unsigned char has_diag324 : 1;
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unsigned char has_sipl : 1;
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unsigned char has_sipl_eckd : 1;
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unsigned char has_dirq : 1;
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unsigned char has_iplcc : 1;
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unsigned char has_zpci_lsi : 1;
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unsigned char has_aisii : 1;
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unsigned char has_aeni : 1;
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unsigned char has_aisi : 1;
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unsigned char has_astfleie2 : 1;
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unsigned int ibc;
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unsigned int mtid;
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unsigned int mtid_cp;
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unsigned int mtid_prev;
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unsigned long rzm;
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unsigned long rnmax;
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unsigned long hamax;
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unsigned int max_cores;
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unsigned long hsa_size;
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unsigned long facilities;
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unsigned int hmfai;
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};
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extern struct sclp_info sclp;
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struct sccb_header {
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u16 length;
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u8 function_code;
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u8 control_mask[3];
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u16 response_code;
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} __packed;
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struct evbuf_header {
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u16 length;
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u8 type;
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u8 flags;
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u16 _reserved;
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} __packed;
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struct err_notify_evbuf {
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struct evbuf_header header;
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u8 action;
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u8 atype;
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u32 fh;
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u32 fid;
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u8 data[];
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} __packed;
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struct err_notify_sccb {
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struct sccb_header header;
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struct err_notify_evbuf evbuf;
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} __packed;
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struct zpci_report_error_header {
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u8 version; /* Interface version byte */
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u8 action; /* Action qualifier byte
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* 0: Adapter Reset Request
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* 1: Deconfigure and repair action requested
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* (OpenCrypto Problem Call Home)
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* 2: Informational Report
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* (OpenCrypto Successful Diagnostics Execution)
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*/
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u16 length; /* Length of Subsequent Data (up to 4K – SCLP header */
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u8 data[]; /* Subsequent Data passed verbatim to SCLP ET 24 */
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} __packed;
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extern char *sclp_early_sccb;
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void sclp_early_adjust_va(void);
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void sclp_early_set_buffer(void *sccb);
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int sclp_early_read_info(void);
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int sclp_early_read_storage_info(void);
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int sclp_early_get_core_info(struct sclp_core_info *info);
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void sclp_early_get_ipl_info(struct sclp_ipl_info *info);
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void sclp_early_detect(void);
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void sclp_early_detect_machine_features(void);
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void sclp_early_printk(const char *s);
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void __sclp_early_printk(const char *s, unsigned int len);
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void sclp_emergency_printk(const char *s);
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int sclp_init(void);
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int sclp_early_get_memsize(unsigned long *mem);
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int sclp_early_get_hsa_size(unsigned long *hsa_size);
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int _sclp_get_core_info(struct sclp_core_info *info);
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int sclp_core_configure(u8 core);
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int sclp_core_deconfigure(u8 core);
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int sclp_sdias_blk_count(void);
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int sclp_sdias_copy(void *dest, int blk_num, int nr_blks);
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int sclp_chp_configure(struct chp_id chpid);
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int sclp_chp_deconfigure(struct chp_id chpid);
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int sclp_chp_read_info(struct sclp_chp_info *info);
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int sclp_pci_configure(u32 fid);
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int sclp_pci_deconfigure(u32 fid);
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int sclp_ap_configure(u32 apid);
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int sclp_ap_deconfigure(u32 apid);
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int sclp_pci_report(struct zpci_report_error_header *report, u32 fh, u32 fid);
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size_t memcpy_hsa_iter(struct iov_iter *iter, unsigned long src, size_t count);
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void sclp_ocf_cpc_name_copy(char *dst);
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static inline int sclp_get_core_info(struct sclp_core_info *info, int early)
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{
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if (early)
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return sclp_early_get_core_info(info);
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return _sclp_get_core_info(info);
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}
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#endif /* __ASSEMBLER__ */
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#endif /* _ASM_S390_SCLP_H */
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