mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2026-08-09 06:14:34 +02:00
Ahmed S. DarwishandBorislav Petkov (AMD)
7b49a3fb69
Modify all CPUID call sites which implicitly include any of the CPUID headers to explicitly include them instead. For KVM's reverse_cpuid.h, just include <asm/cpuid/types.h> since it references the CPUID_EAX..EDX symbols without using the CPUID APIs. Note, this allows removing the inclusion of <asm/cpuid/api.h> from within <asm/processor.h> next. That allows the CPUID API headers to include <asm/processor.h> without introducing a circular dependency. Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/20260327021645.555257-1-darwi@linutronix.de
95 lines
2.1 KiB
C
95 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_ACRN_H
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#define _ASM_X86_ACRN_H
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#include <asm/cpuid/api.h>
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/*
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* This CPUID returns feature bitmaps in EAX.
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* Guest VM uses this to detect the appropriate feature bit.
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*/
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#define ACRN_CPUID_FEATURES 0x40000001
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/* Bit 0 indicates whether guest VM is privileged */
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#define ACRN_FEATURE_PRIVILEGED_VM BIT(0)
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/*
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* Timing Information.
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* This leaf returns the current TSC frequency in kHz.
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*
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* EAX: (Virtual) TSC frequency in kHz.
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* EBX, ECX, EDX: RESERVED (reserved fields are set to zero).
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*/
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#define ACRN_CPUID_TIMING_INFO 0x40000010
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void acrn_setup_intr_handler(void (*handler)(void));
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void acrn_remove_intr_handler(void);
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static inline u32 acrn_cpuid_base(void)
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{
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if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
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return cpuid_base_hypervisor("ACRNACRNACRN", 0);
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return 0;
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}
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static inline unsigned long acrn_get_tsc_khz(void)
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{
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return cpuid_eax(ACRN_CPUID_TIMING_INFO);
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}
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/*
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* Hypercalls for ACRN
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*
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* - VMCALL instruction is used to implement ACRN hypercalls.
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* - ACRN hypercall ABI:
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* - Hypercall number is passed in R8 register.
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* - Up to 2 arguments are passed in RDI, RSI.
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* - Return value will be placed in RAX.
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*
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* Because GCC doesn't support R8 register as direct register constraints, use
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* supported constraint as input with a explicit MOV to R8 in beginning of asm.
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*/
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static inline long acrn_hypercall0(unsigned long hcall_id)
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{
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long result;
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asm volatile("movl %1, %%r8d\n\t"
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"vmcall\n\t"
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: "=a" (result)
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: "g" (hcall_id)
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: "r8", "memory");
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return result;
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}
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static inline long acrn_hypercall1(unsigned long hcall_id,
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unsigned long param1)
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{
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long result;
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asm volatile("movl %1, %%r8d\n\t"
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"vmcall\n\t"
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: "=a" (result)
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: "g" (hcall_id), "D" (param1)
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: "r8", "memory");
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return result;
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}
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static inline long acrn_hypercall2(unsigned long hcall_id,
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unsigned long param1,
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unsigned long param2)
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{
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long result;
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asm volatile("movl %1, %%r8d\n\t"
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"vmcall\n\t"
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: "=a" (result)
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: "g" (hcall_id), "D" (param1), "S" (param2)
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: "r8", "memory");
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return result;
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}
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#endif /* _ASM_X86_ACRN_H */
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