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Struct ast_dramstruct contains a 16-bit index field that either contains a magic value or serves as index into the P2A address segment at 0x1e600000. This segment serves MCR and SCU registers, which the ast_dramstruct programs. It's fragile and relies upon the ast_post_chip_*() functions to set up the segment correctly. Replace the 16-bit index with a full 32-bit address of the SCU and MCR addresses. Initialize the DRAM tables with full register constants and write them out with ast_moutdwm(). This sets the correct segment on each write. Drop __AST_DRAMSTRUCT_DRAM_TYPE as it simply referred to MCR04. Use the latter for initializing the DRAM tables. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patch.msgid.link/20260327133532.79696-10-tzimmermann@suse.de
49 lines
1.2 KiB
C
49 lines
1.2 KiB
C
/* SPDX-License-Identifier: MIT */
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#ifndef AST_POST_H
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#define AST_POST_H
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#include <linux/limits.h>
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#include <linux/types.h>
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struct ast_device;
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/* DRAM timing tables */
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struct ast_dramstruct {
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u32 index;
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u32 data;
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};
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/* control commands */
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#define __AST_DRAMSTRUCT_UDELAY 0xff00
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#define __AST_DRAMSTRUCT_INVALID 0xffff
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#define __AST_DRAMSTRUCT_INDEX(_name) \
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(__AST_DRAMSTRUCT_ ## _name)
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#define __AST_DRAMSTRUCT_INIT(_index, _value) \
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{ (_index), (_value) }
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#define AST_DRAMSTRUCT_REG(_reg, _value) \
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__AST_DRAMSTRUCT_INIT(_reg, _value)
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#define AST_DRAMSTRUCT_UDELAY(_usecs) \
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__AST_DRAMSTRUCT_INIT(__AST_DRAMSTRUCT_UDELAY, _usecs)
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#define AST_DRAMSTRUCT_INVALID \
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__AST_DRAMSTRUCT_INIT(__AST_DRAMSTRUCT_INVALID, U32_MAX)
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#define AST_DRAMSTRUCT_IS_REG(_entry, _reg) \
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((_entry)->index == (_reg))
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#define AST_DRAMSTRUCT_IS(_entry, _name) \
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((_entry)->index == __AST_DRAMSTRUCT_INDEX(_name))
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bool mmc_test(struct ast_device *ast, u32 datagen, u8 test_ctl);
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bool mmc_test_burst(struct ast_device *ast, u32 datagen);
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/* ast_2000.c */
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void ast_2000_set_def_ext_reg(struct ast_device *ast);
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/* ast_2300.c */
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void ast_2300_set_def_ext_reg(struct ast_device *ast);
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#endif
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