mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2026-08-09 06:14:34 +02:00
Gary GuoandDanilo Krummrich
99676aed1f
Currently Nova code uses `&'a Bar0` a lot. This is `&'a Mmio`, where `Mmio` represents an owned MMIO region; this type only exists as a target for `Deref` so `Bar` and `IoMem` can share code and should be avoided to be named directly. The upcoming I/O projection series would make `Io` trait much simpler to implement, and thus the owned MMIO type would be removed in favour of direct `Io` implementation on `Bar` and `IoMem`. Add lifetime parameter to `Bar0<'a>` and change it to be alias of `&'a pci::Bar<'a, ..>`. This also prepares Nova core so that when I/O projection series land, this could be changed to using a MMIO view type directly which avoids double indirection. Signed-off-by: Gary Guo <gary@garyguo.net> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260602170416.2268531-1-gary@kernel.org [ Rebase onto latest drm-rust-next (Blackwell enablement). - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>
99 lines
3.2 KiB
Rust
99 lines
3.2 KiB
Rust
// SPDX-License-Identifier: GPL-2.0
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use kernel::prelude::*;
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use crate::{
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driver::Bar0,
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falcon::{
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Falcon,
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FalconBromParams,
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FalconEngine, //
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},
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gpu::{
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Architecture,
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Chipset, //
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},
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};
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mod ga102;
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mod tu102;
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/// Method used to load data into falcon memory. Some GPU architectures need
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/// PIO and others can use DMA.
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pub(crate) enum LoadMethod {
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/// Programmed I/O
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Pio,
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/// Direct Memory Access
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Dma,
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}
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/// Hardware Abstraction Layer for Falcon cores.
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///
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/// Implements chipset-specific low-level operations. The trait is generic against [`FalconEngine`]
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/// so its `BASE` parameter can be used in order to avoid runtime bound checks when accessing
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/// registers.
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pub(crate) trait FalconHal<E: FalconEngine>: Send + Sync {
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/// Activates the Falcon core if the engine is a risvc/falcon dual engine.
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fn select_core(&self, _falcon: &Falcon<E>, _bar: Bar0<'_>) -> Result {
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Ok(())
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}
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/// Returns the fused version of the signature to use in order to run a HS firmware on this
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/// falcon instance. `engine_id_mask` and `ucode_id` are obtained from the firmware header.
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fn signature_reg_fuse_version(
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&self,
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falcon: &Falcon<E>,
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bar: Bar0<'_>,
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engine_id_mask: u16,
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ucode_id: u8,
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) -> Result<u32>;
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/// Program the boot ROM registers prior to starting a secure firmware.
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fn program_brom(&self, falcon: &Falcon<E>, bar: Bar0<'_>, params: &FalconBromParams);
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/// Check if the RISC-V core is active.
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/// Returns `true` if the RISC-V core is active, `false` otherwise.
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fn is_riscv_active(&self, bar: Bar0<'_>) -> bool;
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/// Wait for memory scrubbing to complete.
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fn reset_wait_mem_scrubbing(&self, bar: Bar0<'_>) -> Result;
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/// Reset the falcon engine.
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fn reset_eng(&self, bar: Bar0<'_>) -> Result;
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/// Returns the method used to load data into the falcon's memory.
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///
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/// The only chipsets supporting PIO are those < GA102, and PIO is the preferred method for
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/// these. For anything above, the PIO registers appear to be masked to the CPU, so DMA is the
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/// only usable method.
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fn load_method(&self) -> LoadMethod;
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}
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/// Returns a boxed falcon HAL adequate for `chipset`.
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///
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/// We use a heap-allocated trait object instead of a statically defined one because the
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/// generic `FalconEngine` argument makes it difficult to define all the combinations
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/// statically.
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pub(super) fn falcon_hal<E: FalconEngine + 'static>(
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chipset: Chipset,
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) -> Result<KBox<dyn FalconHal<E>>> {
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let hal = match chipset.arch() {
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Architecture::Turing => {
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KBox::new(tu102::Tu102::<E>::new(), GFP_KERNEL)? as KBox<dyn FalconHal<E>>
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}
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// GA100 boots like Turing so use Turing HAL
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Architecture::Ampere if chipset == Chipset::GA100 => {
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KBox::new(tu102::Tu102::<E>::new(), GFP_KERNEL)? as KBox<dyn FalconHal<E>>
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}
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Architecture::Ampere
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| Architecture::Ada
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| Architecture::Hopper
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| Architecture::BlackwellGB10x
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| Architecture::BlackwellGB20x => {
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KBox::new(ga102::Ga102::<E>::new(), GFP_KERNEL)? as KBox<dyn FalconHal<E>>
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}
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};
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Ok(hal)
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}
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