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Jason GunthorpeandJoerg Roedel
082ad5ed07
Use the RISC-V IOMMU Address Range Invalidation extension (capabilities.S, spec section 9.3) to invalidate an IOVA range with a single IOTINVAL.VMA command using NAPOT-encoded addressing. One iommu_iotlb_gather maps to one NAPOT invalidation command. The smallest power-of-two aligned range covering the gather is used since over-invalidation is always safe. S and NL seem to be orthogonal in the spec, so if NL is not supported then global invalidation is probably always going to happen as wiping a large range without a table change is not common. Reviewed-by: Tomasz Jeznach <tjeznach@rivosinc.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Tested-by: Andrew Jones <andrew.jones@oss.qualcomm.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>