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David E. BoxandIlpo Järvinen
adc5d98d9f
Add an ACPI-based PMC PWRM telemetry driver for Nova Lake S. The driver locates PMT discovery data in _DSD under the Intel VSEC UUID, parses it, and registers telemetry regions with the PMT/VSEC framework so PMC telemetry is exposed via existing PMT interfaces. Export pmc_parse_telem_dsd() and pmc_find_telem_guid() to support ACPI discovery in other PMC drivers (e.g., ssram_telemetry) without duplicating ACPI parsing logic. Also export acpi_disc_t typedef from core.h for callers to properly declare discovery table arrays. Selected by INTEL_PMC_CORE. Existing PCI functionality is preserved. Assisted-by: GitHub-Copilot:claude-opus-4.7 Signed-off-by: David E. Box <david.e.box@linux.intel.com> Link: https://patch.msgid.link/09b8211d8a5a79fa019ee2397137a6a43cf19430.1781294741.git.david.e.box@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
56 lines
1.9 KiB
Plaintext
56 lines
1.9 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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#
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# Intel x86 Platform-Specific Drivers
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#
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config INTEL_PMC_CORE
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tristate "Intel PMC Core driver"
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depends on PCI
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depends on ACPI
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depends on INTEL_PMT_TELEMETRY
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select INTEL_PMC_SSRAM_TELEMETRY
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select INTEL_PMC_PWRM_TELEMETRY
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help
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The Intel Platform Controller Hub for Intel Core SoCs provides access
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to Power Management Controller registers via various interfaces. This
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driver can utilize debugging capabilities and supported features as
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exposed by the Power Management Controller. It also may perform some
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tasks in the PMC in order to enable transition into the SLPS0 state.
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It should be selected on all Intel platforms supported by the driver.
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Supported features:
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- SLP_S0_RESIDENCY counter
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- PCH IP Power Gating status
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- LTR Ignore / LTR Show
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- MPHY/PLL gating status (Sunrisepoint PCH only)
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- SLPS0 Debug registers (Cannonlake/Icelake PCH)
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- Low Power Mode registers (Tigerlake and beyond)
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- PMC quirks as needed to enable SLPS0/S0ix
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config INTEL_PMC_SSRAM_TELEMETRY
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tristate
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help
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This driver discovers PMC SSRAM telemetry regions through the PMC's
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MMIO interface (PCI) or ACPI _DSD properties and registers them with
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the Intel VSEC framework as Intel PMT telemetry devices.
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It probes the PMC SSRAM device, extracts DVSEC information from MMIO,
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reads device IDs and base addresses for multiple PMCs (main, IOE, PCH),
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and exposes the discovered telemetry through Intel PMT interfaces
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(including sysfs).
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This option is selected by INTEL_PMC_CORE.
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config INTEL_PMC_PWRM_TELEMETRY
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tristate
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help
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This driver discovers PMC PWRM telemetry regions described in ACPI
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_DSD and registers them with the Intel VSEC framework as Intel PMT
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telemetry devices.
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It validates the ACPI discovery data and publishes the discovered
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regions so they can be accessed through the Intel PMT telemetry
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interfaces (including sysfs).
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This option is selected by INTEL_PMC_CORE.
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