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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2026-08-09 06:14:34 +02:00
Nicolin ChenandJoerg Roedel
91561e1dc9
Controlled by IOMMU drivers, ATS can be enabled "on demand", when a given PASID on a device is attached to an I/O page table. This is working, even when a device has no translation on its RID (i.e., RID is IOMMU bypassed). However, certain PCIe devices require non-PASID ATS on their RID even when the RID is IOMMU bypassed. Call this "ATS always on" in IOMMU term. For example, CXL spec r4.0 notes in sec 3.2.5.13 Memory Type on CXL.cache: "To source requests on CXL.cache, devices need to get the Host Physical Address (HPA) from the Host by means of an ATS request on CXL.io." In other words, the CXL.cache capability requires ATS; otherwise, it can't access host physical memory. Introduce a new pci_ats_required() helper for the IOMMU driver to scan a PCI device and shift ATS policies between "on demand" and "always on". Add the support for CXL.cache devices first. Pre-CXL devices will be added in quirks.c file. Note that pci_ats_required() validates against pci_ats_supported(), so we ensure that untrusted devices (e.g. external ports) will not be always on. This maintains the existing ATS security policy regarding potential side- channel attacks via ATS. Cc: linux-cxl@vger.kernel.org Suggested-by: Vikram Sethi <vsethi@nvidia.com> Suggested-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Tested-by: Nirmoy Das <nirmoyd@nvidia.com> Acked-by: Nirmoy Das <nirmoyd@nvidia.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Nicolin Chen <nicolinc@nvidia.com> Reviewed-by: Yi Liu <yi.l.liu@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
62 lines
2.1 KiB
C
62 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef LINUX_PCI_ATS_H
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#define LINUX_PCI_ATS_H
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#include <linux/pci.h>
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#ifdef CONFIG_PCI_ATS
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/* Address Translation Service */
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bool pci_ats_supported(struct pci_dev *dev);
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int pci_enable_ats(struct pci_dev *dev, int ps);
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int pci_prepare_ats(struct pci_dev *dev, int ps);
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void pci_disable_ats(struct pci_dev *dev);
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int pci_ats_queue_depth(struct pci_dev *dev);
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int pci_ats_page_aligned(struct pci_dev *dev);
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bool pci_ats_required(struct pci_dev *dev);
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#else /* CONFIG_PCI_ATS */
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static inline bool pci_ats_supported(struct pci_dev *d)
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{ return false; }
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static inline int pci_enable_ats(struct pci_dev *d, int ps)
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{ return -ENODEV; }
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static inline int pci_prepare_ats(struct pci_dev *dev, int ps)
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{ return -ENODEV; }
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static inline void pci_disable_ats(struct pci_dev *d) { }
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static inline int pci_ats_queue_depth(struct pci_dev *d)
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{ return -ENODEV; }
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static inline int pci_ats_page_aligned(struct pci_dev *dev)
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{ return 0; }
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static inline bool pci_ats_required(struct pci_dev *dev)
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{ return false; }
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#endif /* CONFIG_PCI_ATS */
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#ifdef CONFIG_PCI_PRI
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int pci_enable_pri(struct pci_dev *pdev, u32 reqs);
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void pci_disable_pri(struct pci_dev *pdev);
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int pci_reset_pri(struct pci_dev *pdev);
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int pci_prg_resp_pasid_required(struct pci_dev *pdev);
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bool pci_pri_supported(struct pci_dev *pdev);
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#else
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static inline bool pci_pri_supported(struct pci_dev *pdev)
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{ return false; }
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#endif /* CONFIG_PCI_PRI */
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#ifdef CONFIG_PCI_PASID
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int pci_enable_pasid(struct pci_dev *pdev, int features);
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void pci_disable_pasid(struct pci_dev *pdev);
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int pci_pasid_features(struct pci_dev *pdev);
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int pci_max_pasids(struct pci_dev *pdev);
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int pci_pasid_status(struct pci_dev *pdev);
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#else /* CONFIG_PCI_PASID */
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static inline int pci_enable_pasid(struct pci_dev *pdev, int features)
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{ return -EINVAL; }
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static inline void pci_disable_pasid(struct pci_dev *pdev) { }
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static inline int pci_pasid_features(struct pci_dev *pdev)
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{ return -EINVAL; }
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static inline int pci_max_pasids(struct pci_dev *pdev)
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{ return -EINVAL; }
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static inline int pci_pasid_status(struct pci_dev *pdev)
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{ return -EINVAL; }
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#endif /* CONFIG_PCI_PASID */
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#endif /* LINUX_PCI_ATS_H */
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