mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2026-08-09 06:14:34 +02:00
Thomas Weißschuh
835fa43a4d
On architectures with 32-bit longs, call the compat syscall __NR_ftruncate64. As off_t is 64-bit it must be split into 2 registers. Unlike llseek() which passes the high and low parts in explicitly named arguments, the order here is endian independent. Some architectures (arm, mips, ppc) require this pair of registers to be aligned to an even register, so add custom _sys_ftruncate64() wrappers for those. A test case for ftruncate is added which validates negative length or invalid fd return the appropriate error, and checks the length is correct on success. Co-developed-by: Jordan Richards <jordanrichards@google.com> Signed-off-by: Jordan Richards <jordanrichards@google.com> Signed-off-by: Thomas Weißschuh <linux@weissschuh.net> Acked-by: Willy Tarreau <w@1wt.eu> Reviewed-by: Daniel Palmer <daniel@thingy.jp> Link: https://patch.msgid.link/20260521-nolibc-ftruncate-v1-3-5384a83b2402@weissschuh.net
210 lines
11 KiB
C
210 lines
11 KiB
C
/* SPDX-License-Identifier: LGPL-2.1 OR MIT */
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/*
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* ARM specific definitions for NOLIBC
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* Copyright (C) 2017-2022 Willy Tarreau <w@1wt.eu>
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*/
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#ifndef _NOLIBC_ARCH_ARM_H
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#define _NOLIBC_ARCH_ARM_H
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#include <linux/unistd.h>
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#include "compiler.h"
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#include "crt.h"
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#include "std.h"
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/* Syscalls for ARM in ARM or Thumb modes :
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* - registers are 32-bit
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* - stack is 8-byte aligned
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* ( http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka4127.html)
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* - syscall number is passed in r7
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* - arguments are in r0, r1, r2, r3, r4, r5
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* - the system call is performed by calling svc #0
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* - syscall return comes in r0.
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* - only lr is clobbered.
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* - the arguments are cast to long and assigned into the target registers
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* which are then simply passed as registers to the asm code, so that we
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* don't have to experience issues with register constraints.
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* - the syscall number is always specified last in order to allow to force
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* some registers before (gcc refuses a %-register at the last position).
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* - in thumb mode without -fomit-frame-pointer, r7 is also used to store the
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* frame pointer, and we cannot directly assign it as a register variable,
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* nor can we clobber it. Instead we assign the r6 register and swap it
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* with r7 before calling svc, and r6 is marked as clobbered.
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* We're just using any regular register which we assign to r7 after saving
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* it.
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*
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* Also, ARM supports the old_select syscall if newselect is not available
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*/
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#define __ARCH_WANT_SYS_OLD_SELECT
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#if (defined(__THUMBEB__) || defined(__THUMBEL__)) && \
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!defined(NOLIBC_OMIT_FRAME_POINTER)
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/* swap r6,r7 needed in Thumb mode since we can't use nor clobber r7 */
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#define _NOLIBC_SYSCALL_REG "r6"
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#define _NOLIBC_THUMB_SET_R7 "eor r7, r6\neor r6, r7\neor r7, r6\n"
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#define _NOLIBC_THUMB_RESTORE_R7 "mov r7, r6\n"
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#else /* we're in ARM mode */
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/* in Arm mode we can directly use r7 */
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#define _NOLIBC_SYSCALL_REG "r7"
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#define _NOLIBC_THUMB_SET_R7 ""
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#define _NOLIBC_THUMB_RESTORE_R7 ""
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#endif /* end THUMB */
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#define __nolibc_syscall0(num) \
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({ \
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register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
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register long _arg1 __asm__ ("r0"); \
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\
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__asm__ volatile ( \
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_NOLIBC_THUMB_SET_R7 \
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"svc #0\n" \
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_NOLIBC_THUMB_RESTORE_R7 \
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: "=r"(_arg1), "=r"(_num) \
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: "r"(_arg1), \
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"r"(_num) \
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: "memory", "cc", "lr" \
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); \
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_arg1; \
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})
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#define __nolibc_syscall1(num, arg1) \
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({ \
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register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
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register long _arg1 __asm__ ("r0") = (long)(arg1); \
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\
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__asm__ volatile ( \
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_NOLIBC_THUMB_SET_R7 \
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"svc #0\n" \
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_NOLIBC_THUMB_RESTORE_R7 \
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: "=r"(_arg1), "=r" (_num) \
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: "r"(_arg1), \
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"r"(_num) \
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: "memory", "cc", "lr" \
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); \
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_arg1; \
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})
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#define __nolibc_syscall2(num, arg1, arg2) \
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({ \
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register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
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register long _arg1 __asm__ ("r0") = (long)(arg1); \
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register long _arg2 __asm__ ("r1") = (long)(arg2); \
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\
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__asm__ volatile ( \
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_NOLIBC_THUMB_SET_R7 \
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"svc #0\n" \
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_NOLIBC_THUMB_RESTORE_R7 \
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: "=r"(_arg1), "=r" (_num) \
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: "r"(_arg1), "r"(_arg2), \
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"r"(_num) \
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: "memory", "cc", "lr" \
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); \
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_arg1; \
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})
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#define __nolibc_syscall3(num, arg1, arg2, arg3) \
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({ \
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register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
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register long _arg1 __asm__ ("r0") = (long)(arg1); \
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register long _arg2 __asm__ ("r1") = (long)(arg2); \
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register long _arg3 __asm__ ("r2") = (long)(arg3); \
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\
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__asm__ volatile ( \
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_NOLIBC_THUMB_SET_R7 \
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"svc #0\n" \
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_NOLIBC_THUMB_RESTORE_R7 \
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: "=r"(_arg1), "=r" (_num) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), \
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"r"(_num) \
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: "memory", "cc", "lr" \
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); \
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_arg1; \
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})
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#define __nolibc_syscall4(num, arg1, arg2, arg3, arg4) \
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({ \
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register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
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register long _arg1 __asm__ ("r0") = (long)(arg1); \
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register long _arg2 __asm__ ("r1") = (long)(arg2); \
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register long _arg3 __asm__ ("r2") = (long)(arg3); \
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register long _arg4 __asm__ ("r3") = (long)(arg4); \
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\
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__asm__ volatile ( \
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_NOLIBC_THUMB_SET_R7 \
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"svc #0\n" \
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_NOLIBC_THUMB_RESTORE_R7 \
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: "=r"(_arg1), "=r" (_num) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
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"r"(_num) \
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: "memory", "cc", "lr" \
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); \
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_arg1; \
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})
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#define __nolibc_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
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({ \
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register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
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register long _arg1 __asm__ ("r0") = (long)(arg1); \
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register long _arg2 __asm__ ("r1") = (long)(arg2); \
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register long _arg3 __asm__ ("r2") = (long)(arg3); \
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register long _arg4 __asm__ ("r3") = (long)(arg4); \
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register long _arg5 __asm__ ("r4") = (long)(arg5); \
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\
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__asm__ volatile ( \
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_NOLIBC_THUMB_SET_R7 \
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"svc #0\n" \
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_NOLIBC_THUMB_RESTORE_R7 \
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: "=r"(_arg1), "=r" (_num) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
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"r"(_num) \
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: "memory", "cc", "lr" \
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); \
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_arg1; \
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})
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#define __nolibc_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
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({ \
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register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
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register long _arg1 __asm__ ("r0") = (long)(arg1); \
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register long _arg2 __asm__ ("r1") = (long)(arg2); \
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register long _arg3 __asm__ ("r2") = (long)(arg3); \
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register long _arg4 __asm__ ("r3") = (long)(arg4); \
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register long _arg5 __asm__ ("r4") = (long)(arg5); \
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register long _arg6 __asm__ ("r5") = (long)(arg6); \
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\
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__asm__ volatile ( \
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_NOLIBC_THUMB_SET_R7 \
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"svc #0\n" \
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_NOLIBC_THUMB_RESTORE_R7 \
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: "=r"(_arg1), "=r" (_num) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
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"r"(_arg6), "r"(_num) \
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: "memory", "cc", "lr" \
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); \
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_arg1; \
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})
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#ifndef NOLIBC_NO_RUNTIME
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/* startup code */
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void __attribute__((weak, noreturn)) __nolibc_entrypoint __nolibc_no_stack_protector _start(void)
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{
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__asm__ volatile (
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"mov r0, sp\n" /* save stack pointer to %r0, as arg1 of _start_c */
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"bl _start_c\n" /* transfer to c runtime */
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);
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__nolibc_entrypoint_epilogue();
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}
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#endif /* NOLIBC_NO_RUNTIME */
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static __attribute__((unused))
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int _sys_ftruncate64(int fd, uint32_t length0, uint32_t length1)
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{
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return __nolibc_syscall4(__NR_ftruncate64, fd, 0, length0, length1);
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}
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#define _sys_ftruncate64 _sys_ftruncate64
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#endif /* _NOLIBC_ARCH_ARM_H */
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