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b76eaef983
commit5214a9f6c0upstream. Consolidate the whole logic which determines whether the microcode loader should be enabled or not into a single function and call it everywhere. Well, almost everywhere - not in mk_early_pgtbl_32() because there the kernel is running without paging enabled and checking dis_ucode_ldr et al would require physical addresses and uglification of the code. But since this is 32-bit, the easier thing to do is to simply map the initrd unconditionally especially since that mapping is getting removed later anyway by zap_early_initrd_mapping() and avoid the uglification. In doing so, address the issue of old 486er machines without CPUID support, not booting current kernels. [ mingo: Fix no previous prototype for ‘microcode_loader_disabled’ [-Wmissing-prototypes] ] Fixes:4c585af718("x86/boot/32: Temporarily map initrd for microcode loading") Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Cc: <stable@kernel.org> Link: https://lore.kernel.org/r/CANpbe9Wm3z8fy9HbgS8cuhoj0TREYEEkBipDuhgkWFvqX0UoVQ@mail.gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
92 lines
2.2 KiB
C
92 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_MICROCODE_H
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#define _ASM_X86_MICROCODE_H
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struct cpu_signature {
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unsigned int sig;
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unsigned int pf;
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unsigned int rev;
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};
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struct ucode_cpu_info {
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struct cpu_signature cpu_sig;
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void *mc;
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};
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#ifdef CONFIG_MICROCODE
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void load_ucode_bsp(void);
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void load_ucode_ap(void);
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void microcode_bsp_resume(void);
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bool __init microcode_loader_disabled(void);
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#else
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static inline void load_ucode_bsp(void) { }
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static inline void load_ucode_ap(void) { }
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static inline void microcode_bsp_resume(void) { }
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static inline bool __init microcode_loader_disabled(void) { return false; }
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#endif
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extern unsigned long initrd_start_early;
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#ifdef CONFIG_CPU_SUP_INTEL
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/* Intel specific microcode defines. Public for IFS */
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struct microcode_header_intel {
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unsigned int hdrver;
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unsigned int rev;
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unsigned int date;
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unsigned int sig;
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unsigned int cksum;
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unsigned int ldrver;
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unsigned int pf;
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unsigned int datasize;
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unsigned int totalsize;
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unsigned int metasize;
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unsigned int min_req_ver;
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unsigned int reserved;
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};
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struct microcode_intel {
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struct microcode_header_intel hdr;
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unsigned int bits[];
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};
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#define DEFAULT_UCODE_DATASIZE (2000)
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#define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
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#define MC_HEADER_TYPE_MICROCODE 1
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#define MC_HEADER_TYPE_IFS 2
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static inline int intel_microcode_get_datasize(struct microcode_header_intel *hdr)
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{
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return hdr->datasize ? : DEFAULT_UCODE_DATASIZE;
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}
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static inline u32 intel_get_microcode_revision(void)
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{
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u32 rev, dummy;
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native_wrmsrl(MSR_IA32_UCODE_REV, 0);
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/* As documented in the SDM: Do a CPUID 1 here */
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native_cpuid_eax(1);
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/* get the current revision from MSR 0x8B */
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native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
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return rev;
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}
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#endif /* !CONFIG_CPU_SUP_INTEL */
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bool microcode_nmi_handler(void);
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void microcode_offline_nmi_handler(void);
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#ifdef CONFIG_MICROCODE_LATE_LOADING
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DECLARE_STATIC_KEY_FALSE(microcode_nmi_handler_enable);
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static __always_inline bool microcode_nmi_handler_enabled(void)
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{
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return static_branch_unlikely(µcode_nmi_handler_enable);
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}
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#else
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static __always_inline bool microcode_nmi_handler_enabled(void) { return false; }
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#endif
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#endif /* _ASM_X86_MICROCODE_H */
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