Robin Murphy 3479e0e9a3 perf/arm-cmn: Fix CMN S3 DTM offset ...

commit b3fe1c83a5 upstream.

CMN S3's DTM offset is different between r0px and r1p0, and it
turns out this was not a error in the earlier documentation, but
does actually exist in the design. Lovely.

Cc: stable@vger.kernel.org
Fixes: 0dc2f4963f ("perf/arm-cmn: Support CMN S3")
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2025-10-19 16:33:45 +02:00

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amlogic

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arm_cspmu

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hisilicon

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alibaba_uncore_drw_pmu.c

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apple_m1_cpu_pmu.c

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arm_dmc620_pmu.c

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arm_dsu_pmu.c

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arm_pmu_acpi.c

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arm_pmu_platform.c

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arm_pmu.c

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arm_pmuv3.c

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arm_smmuv3_pmu.c

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arm_spe_pmu.c

perf: arm_spe: Prevent overflow in PERF_IDX2OFF()

2025-10-15 11:59:54 +02:00

arm_v6_pmu.c

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arm_v7_pmu.c

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arm_xscale_pmu.c

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arm-cci.c

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arm-ccn.c

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arm-cmn.c

perf/arm-cmn: Fix CMN S3 DTM offset

2025-10-19 16:33:45 +02:00

arm-ni.c

perf/arm: Add missing .suppress_bind_attrs

2025-08-20 18:30:33 +02:00

cxl_pmu.c

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dwc_pcie_pmu.c

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fsl_imx8_ddr_perf.c

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fsl_imx9_ddr_perf.c

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Kconfig

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Makefile

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marvell_cn10k_ddr_pmu.c

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marvell_cn10k_tad_pmu.c

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qcom_l2_pmu.c

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qcom_l3_pmu.c

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riscv_pmu_legacy.c

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riscv_pmu_sbi.c

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riscv_pmu.c

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starfive_starlink_pmu.c

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thunderx2_pmu.c

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xgene_pmu.c

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