David (Ming Qiang) Wu 909c84e12c amdgpu/jpeg: fix deepsleep register for jpeg 5_0_0 and 5_0_2 ...

commit e90dc3b2d7 upstream.

PCTL0__MMHUB_DEEPSLEEP_IB is 0x69004 on MMHUB 4,1,0 and
and 0x60804 on MMHUB 4,2,0. 0x62a04 is on MMHUB 1,8,0/1.

The DS bits are adjusted to cover more JPEG engines and MMHUB
version.

Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2026-05-07 06:09:39 +02:00

..

drm

amdgpu/jpeg: fix deepsleep register for jpeg 5_0_0 and 5_0_2

2026-05-07 06:09:39 +02:00

host1x

gpu: host1x: Fix race in syncpt alloc/free

2025-12-18 13:54:40 +01:00

ipu-v3

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trace

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vga

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Makefile

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