mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2026-04-29 12:28:27 +02:00
Deepak Gupta
2af7c9cf02
Expose a new register type NT_RISCV_USER_CFI for risc-v CFI status and state. Intentionally, both landing pad and shadow stack status and state are rolled into the CFI state. Creating two different NT_RISCV_USER_XXX would not be useful and would waste a note type. Enabling, disabling and locking the CFI feature is not allowed via ptrace set interface. However, setting 'elp' state or setting shadow stack pointer are allowed via the ptrace set interface. It is expected that 'gdb' might need to fixup 'elp' state or 'shadow stack' pointer. Signed-off-by: Deepak Gupta <debug@rivosinc.com> Tested-by: Andreas Korb <andreas.korb@aisec.fraunhofer.de> # QEMU, custom CVA6 Tested-by: Valentin Haudiquet <valentin.haudiquet@canonical.com> Link: https://patch.msgid.link/20251112-v5_user_cfi_series-v23-19-b55691eacf4f@rivosinc.com [pjw@kernel.org: updated to apply; cleaned patch description and comments; addressed checkpatch issues] Signed-off-by: Paul Walmsley <pjw@kernel.org>
167 lines
3.6 KiB
C
167 lines
3.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
|
|
/*
|
|
* Copyright (C) 2012 Regents of the University of California
|
|
*/
|
|
|
|
#ifndef _UAPI_ASM_RISCV_PTRACE_H
|
|
#define _UAPI_ASM_RISCV_PTRACE_H
|
|
|
|
#ifndef __ASSEMBLER__
|
|
|
|
#include <linux/types.h>
|
|
|
|
#define PTRACE_GETFDPIC 33
|
|
|
|
#define PTRACE_GETFDPIC_EXEC 0
|
|
#define PTRACE_GETFDPIC_INTERP 1
|
|
|
|
/*
|
|
* User-mode register state for core dumps, ptrace, sigcontext
|
|
*
|
|
* This decouples struct pt_regs from the userspace ABI.
|
|
* struct user_regs_struct must form a prefix of struct pt_regs.
|
|
*/
|
|
struct user_regs_struct {
|
|
unsigned long pc;
|
|
unsigned long ra;
|
|
unsigned long sp;
|
|
unsigned long gp;
|
|
unsigned long tp;
|
|
unsigned long t0;
|
|
unsigned long t1;
|
|
unsigned long t2;
|
|
unsigned long s0;
|
|
unsigned long s1;
|
|
unsigned long a0;
|
|
unsigned long a1;
|
|
unsigned long a2;
|
|
unsigned long a3;
|
|
unsigned long a4;
|
|
unsigned long a5;
|
|
unsigned long a6;
|
|
unsigned long a7;
|
|
unsigned long s2;
|
|
unsigned long s3;
|
|
unsigned long s4;
|
|
unsigned long s5;
|
|
unsigned long s6;
|
|
unsigned long s7;
|
|
unsigned long s8;
|
|
unsigned long s9;
|
|
unsigned long s10;
|
|
unsigned long s11;
|
|
unsigned long t3;
|
|
unsigned long t4;
|
|
unsigned long t5;
|
|
unsigned long t6;
|
|
};
|
|
|
|
struct __riscv_f_ext_state {
|
|
__u32 f[32];
|
|
__u32 fcsr;
|
|
};
|
|
|
|
struct __riscv_d_ext_state {
|
|
__u64 f[32];
|
|
__u32 fcsr;
|
|
};
|
|
|
|
struct __riscv_q_ext_state {
|
|
__u64 f[64] __attribute__((aligned(16)));
|
|
__u32 fcsr;
|
|
/*
|
|
* Reserved for expansion of sigcontext structure. Currently zeroed
|
|
* upon signal, and must be zero upon sigreturn.
|
|
*/
|
|
__u32 reserved[3];
|
|
};
|
|
|
|
struct __riscv_ctx_hdr {
|
|
__u32 magic;
|
|
__u32 size;
|
|
};
|
|
|
|
struct __riscv_extra_ext_header {
|
|
__u32 __padding[129] __attribute__((aligned(16)));
|
|
/*
|
|
* Reserved for expansion of sigcontext structure. Currently zeroed
|
|
* upon signal, and must be zero upon sigreturn.
|
|
*/
|
|
__u32 reserved;
|
|
struct __riscv_ctx_hdr hdr;
|
|
};
|
|
|
|
union __riscv_fp_state {
|
|
struct __riscv_f_ext_state f;
|
|
struct __riscv_d_ext_state d;
|
|
struct __riscv_q_ext_state q;
|
|
};
|
|
|
|
struct __riscv_v_ext_state {
|
|
unsigned long vstart;
|
|
unsigned long vl;
|
|
unsigned long vtype;
|
|
unsigned long vcsr;
|
|
unsigned long vlenb;
|
|
void *datap;
|
|
/*
|
|
* In signal handler, datap will be set a correct user stack offset
|
|
* and vector registers will be copied to the address of datap
|
|
* pointer.
|
|
*/
|
|
};
|
|
|
|
struct __riscv_v_regset_state {
|
|
unsigned long vstart;
|
|
unsigned long vl;
|
|
unsigned long vtype;
|
|
unsigned long vcsr;
|
|
unsigned long vlenb;
|
|
char vreg[];
|
|
};
|
|
|
|
/*
|
|
* According to spec: The number of bits in a single vector register,
|
|
* VLEN >= ELEN, which must be a power of 2, and must be no greater than
|
|
* 2^16 = 65536bits = 8192bytes
|
|
*/
|
|
#define RISCV_MAX_VLENB (8192)
|
|
|
|
struct __sc_riscv_cfi_state {
|
|
unsigned long ss_ptr; /* shadow stack pointer */
|
|
};
|
|
|
|
#define PTRACE_CFI_LP_EN_BIT 0
|
|
#define PTRACE_CFI_LP_LOCK_BIT 1
|
|
#define PTRACE_CFI_ELP_BIT 2
|
|
#define PTRACE_CFI_SS_EN_BIT 3
|
|
#define PTRACE_CFI_SS_LOCK_BIT 4
|
|
#define PTRACE_CFI_SS_PTR_BIT 5
|
|
|
|
#define PTRACE_CFI_LP_EN_STATE BIT(PTRACE_CFI_LP_EN_BIT)
|
|
#define PTRACE_CFI_LP_LOCK_STATE BIT(PTRACE_CFI_LP_LOCK_BIT)
|
|
#define PTRACE_CFI_ELP_STATE BIT(PTRACE_CFI_ELP_BIT)
|
|
#define PTRACE_CFI_SS_EN_STATE BIT(PTRACE_CFI_SS_EN_BIT)
|
|
#define PTRACE_CFI_SS_LOCK_STATE BIT(PTRACE_CFI_SS_LOCK_BIT)
|
|
#define PTRACE_CFI_SS_PTR_STATE BIT(PTRACE_CFI_SS_PTR_BIT)
|
|
|
|
#define PRACE_CFI_STATE_INVALID_MASK ~(PTRACE_CFI_LP_EN_STATE | \
|
|
PTRACE_CFI_LP_LOCK_STATE | \
|
|
PTRACE_CFI_ELP_STATE | \
|
|
PTRACE_CFI_SS_EN_STATE | \
|
|
PTRACE_CFI_SS_LOCK_STATE | \
|
|
PTRACE_CFI_SS_PTR_STATE)
|
|
|
|
struct __cfi_status {
|
|
__u64 cfi_state;
|
|
};
|
|
|
|
struct user_cfi_state {
|
|
struct __cfi_status cfi_status;
|
|
__u64 shstk_ptr;
|
|
};
|
|
|
|
#endif /* __ASSEMBLER__ */
|
|
|
|
#endif /* _UAPI_ASM_RISCV_PTRACE_H */
|