Li MaandGreg Kroah-Hartman 4eff07025c drm/amdgpu/atomfirmware: add intergrated info v2.3 table ...

commit e64e8f7c17 upstream.

[Why]
The vram width value is 0.
Because the integratedsysteminfo table in VBIOS has updated to 2.3.

[How]
Driver needs a new intergrated info v2.3 table too.
Then the vram width value will be correct.

Signed-off-by: Li Ma <li.ma@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2024-06-16 13:47:37 +02:00

..

asic_reg

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ivsrcid

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aldebaran_ip_offset.h

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amd_acpi.h

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amd_pcie_helpers.h

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amd_pcie.h

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amd_shared.h

drm/amd: Add concept of running prepare_suspend() sequence for IP blocks

2024-04-10 16:35:55 +02:00

arct_ip_offset.h

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atom-bits.h

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atom-names.h

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atom-types.h

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atombios.h

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atomfirmware.h

drm/amdgpu/atomfirmware: add intergrated info v2.3 table

2024-06-16 13:47:37 +02:00

atomfirmwareid.h

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beige_goby_ip_offset.h

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cgs_common.h

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cik_structs.h

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cyan_skillfish_ip_offset.h

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dimgrey_cavefish_ip_offset.h

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discovery.h

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displayobject.h

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dm_pp_interface.h

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kgd_kfd_interface.h

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kgd_pp_interface.h

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mes_api_def.h

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mes_v11_api_def.h

drm/amdkfd: fix mes set shader debugger process management

2024-02-05 20:14:28 +00:00

navi10_enum.h

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navi10_ip_offset.h

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navi12_ip_offset.h

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navi14_ip_offset.h

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pptable.h

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renoir_ip_offset.h

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sienna_cichlid_ip_offset.h

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soc15_hw_ip.h

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soc15_ih_clientid.h

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soc21_enum.h

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v9_structs.h

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v10_structs.h

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v11_structs.h

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vangogh_ip_offset.h

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vega10_enum.h

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vega10_ip_offset.h

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vega20_ip_offset.h

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vi_structs.h

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yellow_carp_offset.h

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