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Wei Fang
dd4a5780f7
Both PF and VF have rx-vlan-offload enabled, however, the PCVLANR1/2 registers are resources controlled by PF, so VF cannot access these two registers. Fortunately, the hardware provides SICVLANR1/2 registers for each SI to reflect the value of PCVLANR1/2 registers. Therefore, use SICVLANR1/2 instead of PCVLANR1/2. Note that this is not an issue in actual use, because the current driver does not support custom TPID, the driver will not access these two registers in actual use, so this modification is just an optimization. In addition, since ENETC_RXBD_FLAG_TPID is defined as GENMASK(1, 0), the possible values are only 0, 1, 2, 3, so the default branch will never be true, so remove the default branch. Signed-off-by: Wei Fang <wei.fang@nxp.com> Link: https://patch.msgid.link/20250613093605.39277-1-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>