Imre Deak 729e7d4b1c drm/i915/dsi: Use TRANS_DDI_FUNC_CTL's own port width macro ...

[ Upstream commit 879f70382f ]

The format of the port width field in the DDI_BUF_CTL and the
TRANS_DDI_FUNC_CTL registers are different starting with MTL, where the
x3 lane mode for HDMI FRL has a different encoding in the two registers.
To account for this use the TRANS_DDI_FUNC_CTL's own port width macro.

Cc: <stable@vger.kernel.org> # v6.5+
Fixes: b66a8abaa4 ("drm/i915/display/mtl: Fill port width in DDI_BUF_/TRANS_DDI_FUNC_/PORT_BUF_CTL for HDMI")
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250214142001.552916-2-imre.deak@intel.com
(cherry picked from commit 76120b3a30)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

2025-03-13 13:01:39 +01:00

..

drm

drm/i915/dsi: Use TRANS_DDI_FUNC_CTL's own port width macro

2025-03-13 13:01:39 +01:00

host1x

gpu: host1x: Fix a use of uninitialized mutex

2025-02-21 14:01:19 +01:00

ipu-v3

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trace

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vga

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Makefile

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