Vidya Sagar ee22d0c5e8 soc/tegra: bpmp: Update ABI header ...

Update the firmware header to support uninitialization of UPHY PLL
when the PCIe controller is operating in endpoint mode and host cuts
the PCIe reference clock.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>

2020-03-11 10:20:19 +00:00

..

arc

ARCv2: IDU-intc: Add support for edge-triggered interrupts

2019-08-26 22:34:59 +05:30

at91

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19 17:09:55 +02:00

bcm2835

soc: bcm2835: sync firmware properties with downstream

2019-01-09 16:34:46 +01:00

brcmstb

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19 17:09:55 +02:00

fsl

soc: fsl: qe: avoid IS_ERR_VALUE in ucc_fast.c

2019-12-09 13:54:37 -06:00

imx

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19 17:09:55 +02:00

mediatek

iommu/mediatek: Clean up struct mtk_smi_iommu

2019-08-30 15:57:27 +02:00

mscc

net: mscc: ocelot: export ANA, DEV and QSYS registers to include/soc/mscc

2020-01-05 23:22:33 -08:00

nps

…

qcom

soc: qcom: ocmem: add missing includes

2019-10-07 08:19:43 -07:00

rockchip

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288

2019-06-05 17:36:37 +02:00

sa1100

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19 17:09:55 +02:00

sifive

riscv: move sifive_l2_cache.h to include/soc

2020-01-12 10:12:44 -08:00

tegra

soc/tegra: bpmp: Update ABI header

2020-03-11 10:20:19 +00:00