Alex Deucher 2fde24e4dc drm/amdgpu/atomfirmware: update to latest integratedinfotable ...

Used for renoir.

Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2020-07-02 12:02:57 -04:00

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asic_reg

drm amdgpu: SI UVD registers

2020-07-01 01:59:24 -04:00

ivsrcid

drm/amdgpu: add sdma2 and sdma3 irqsrc header files for sienna_cichlid (v2)

2020-06-03 13:52:03 -04:00

amd_acpi.h

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amd_pcie_helpers.h

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amd_pcie.h

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amd_shared.h

drm/amdgpu: add apu flags (v2)

2020-05-22 13:41:53 -04:00

arct_ip_offset.h

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atom-bits.h

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atom-names.h

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atom-types.h

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atombios.h

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atomfirmware.h

drm/amdgpu/atomfirmware: update to latest integratedinfotable

2020-07-02 12:02:57 -04:00

atomfirmwareid.h

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cgs_common.h

drm/amdgpu: retire indirect mmio reg support from cgs

2020-04-09 10:43:18 -04:00

cik_structs.h

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discovery.h

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displayobject.h

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dm_pp_interface.h

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kgd_kfd_interface.h

drm/amdkfd: Consolidate duplicated bo alloc flags

2020-03-10 15:54:34 -04:00

kgd_pp_interface.h

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navi10_enum.h

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navi10_ip_offset.h

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navi12_ip_offset.h

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navi14_ip_offset.h

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pptable.h

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renoir_ip_offset.h

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sienna_cichlid_ip_offset.h

drm/amdgpu: initialize IP offset for sienna_cichlid (v2)

2020-06-03 13:52:00 -04:00

soc15_hw_ip.h

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soc15_ih_clientid.h

drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid

2020-06-03 13:52:04 -04:00

v9_structs.h

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v10_structs.h

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vega10_enum.h

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vega10_ip_offset.h

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vega20_ip_offset.h

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vi_structs.h

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