John Madieu e1a098330e clk: renesas: r9a09g047: Add clock and reset signals for the TSU IP ...

Add required clocks and resets signals for the TSU IP available on the
Renesas RZ/G3E SoC

Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250227122453.30480-3-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

2025-03-06 16:39:31 +01:00

..

clk-div6.c

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clk-div6.h

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clk-emev2.c

clk: renesas: emev2: Remove obsolete clkdev registration

2023-07-27 14:32:41 +02:00

clk-mstp.c

clk: Use of_property_present()

2024-08-02 16:53:38 -07:00

clk-r8a73a4.c

clk: renesas: Remove duplicate and trailing empty lines

2024-10-01 09:13:38 +02:00

clk-r8a7740.c

clk: renesas: shmobile: Remove unused CLK_ENABLE_ON_INIT

2024-04-25 10:38:19 +02:00

clk-r8a7778.c

clk: renesas: Remove duplicate and trailing empty lines

2024-10-01 09:13:38 +02:00

clk-r8a7779.c

clk: renesas: r8a7779: Remove struct r8a7779_cpg

2022-06-13 11:53:18 +02:00

clk-rz.c

clk: renesas: rza1: Remove struct rz_cpg

2022-06-13 11:53:18 +02:00

clk-sh73a0.c

clk: renesas: shmobile: Remove unused CLK_ENABLE_ON_INIT

2024-04-25 10:38:19 +02:00

clk-vbattb.c

clk: renesas: vbattb: Add VBATTB clock driver

2024-11-06 08:52:45 +01:00

Kconfig

clk: renesas: rzv2h: Add support for RZ/G3E SoC

2025-01-07 17:00:55 +01:00

Makefile

clk: renesas: rzv2h: Add support for RZ/G3E SoC

2025-01-07 17:00:55 +01:00

r7s9210-cpg-mssr.c

clk: renesas: r7s9210: Distinguish clocks by clock type

2025-03-04 09:04:23 +01:00

r8a774a1-cpg-mssr.c

clk: renesas: rcar-gen3: Add ADG clocks

2023-08-15 11:34:43 +02:00

r8a774b1-cpg-mssr.c

clk: renesas: rcar-gen3: Add ADG clocks

2023-08-15 11:34:43 +02:00

r8a774c0-cpg-mssr.c

clk: renesas: rcar-gen3: Add ADG clocks

2023-08-15 11:34:43 +02:00

r8a774e1-cpg-mssr.c

clk: renesas: rcar-gen3: Add ADG clocks

2023-08-15 11:34:43 +02:00

r8a779a0-cpg-mssr.c

clk: renesas: r8a779a0: Add ISP core clocks

2025-02-03 11:07:05 +01:00

r8a779f0-cpg-mssr.c

clk: renesas: rcar-gen4: Remove unused default PLL2/3/4/6 configs

2024-07-30 10:44:19 +02:00

r8a779g0-cpg-mssr.c

clk: renesas: r8a779g0: Add ISP core clocks

2025-02-03 11:07:05 +01:00

r8a779h0-cpg-mssr.c

clk: renesas: r8a779h0: Add VSPX clock

2025-02-03 11:07:06 +01:00

r8a7742-cpg-mssr.c

…

r8a7743-cpg-mssr.c

…

r8a7745-cpg-mssr.c

…

r8a7790-cpg-mssr.c

…

r8a7791-cpg-mssr.c

…

r8a7792-cpg-mssr.c

…

r8a7794-cpg-mssr.c

…

r8a7795-cpg-mssr.c

clk: renesas: r8a7795: Constify r8a7795_*_clks

2023-09-26 09:38:00 +02:00

r8a7796-cpg-mssr.c

clk: renesas: rcar-gen3: Add ADG clocks

2023-08-15 11:34:43 +02:00

r8a77470-cpg-mssr.c

…

r8a77965-cpg-mssr.c

clk: renesas: rcar-gen3: Add ADG clocks

2023-08-15 11:34:43 +02:00

r8a77970-cpg-mssr.c

clk: renesas: r8a77970: Use common cpg_lock

2024-06-07 14:09:34 +02:00

r8a77980-cpg-mssr.c

clk: renesas: r8a77980: Add I2C5 clock

2023-03-30 16:44:04 +02:00

r8a77990-cpg-mssr.c

clk: renesas: rcar-gen3: Add ADG clocks

2023-08-15 11:34:43 +02:00

r8a77995-cpg-mssr.c

clk: renesas: rcar-gen3: Add ADG clocks

2023-08-15 11:34:43 +02:00

r9a06g032-clocks.c

clk: renesas: r9a06g032: Use BIT macro consistently

2024-12-10 12:00:30 +01:00

r9a07g043-cpg.c

clk: renesas: r9a07g043: Fix HP clock source for RZ/Five

2025-02-03 11:07:06 +01:00

r9a07g044-cpg.c

clk: renesas: r9a07g044: Add clock and reset entry for DRP-AI

2025-02-03 11:07:05 +01:00

r9a08g045-cpg.c

clk: renesas: r8a08g045: Check the source of the CPU PLL settings

2025-02-03 11:07:06 +01:00

r9a09g011-cpg.c

clk: renesas: Remove duplicate and trailing empty lines

2024-10-01 09:13:38 +02:00

r9a09g047-cpg.c

clk: renesas: r9a09g047: Add clock and reset signals for the TSU IP

2025-03-06 16:39:31 +01:00

r9a09g057-cpg.c

clk: renesas: r9a09g057: Add entries for the DMACs

2025-03-04 09:04:20 +01:00

rcar-cpg-lib.c

clk: renesas: Remove duplicate and trailing empty lines

2024-10-01 09:13:38 +02:00

rcar-cpg-lib.h

…

rcar-gen2-cpg.c

clk: renesas: rcar-gen2: Use DEFINE_SPINLOCK() for static spinlock

2024-06-07 14:10:15 +02:00

rcar-gen2-cpg.h

…

rcar-gen3-cpg.c

clk: renesas: Remove duplicate and trailing empty lines

2024-10-01 09:13:38 +02:00

rcar-gen3-cpg.h

clk: renesas: rcar-gen3: Add support for ZG clock

2023-07-10 09:31:29 +02:00

rcar-gen4-cpg.c

clk: renesas: rcar-gen4: Remove unused fixed PLL clock types

2024-07-30 10:44:19 +02:00

rcar-gen4-cpg.h

clk: renesas: rcar-gen4: Remove unused default PLL2/3/4/6 configs

2024-07-30 10:44:19 +02:00

rcar-usb2-clock-sel.c

clk: Switch back to struct platform_driver::remove()

2024-09-21 14:12:05 -07:00

renesas-cpg-mssr.c

clk: renesas: cpg-mssr: Remove obsolete nullify check

2025-03-04 09:04:23 +01:00

renesas-cpg-mssr.h

clk: renesas: cpg-mssr: Add support for R-Car V4M

2024-01-31 11:19:21 +01:00

rzg2l-cpg.c

clk: renesas: rzg2l: Remove unneeded nullify checks

2025-03-04 09:04:23 +01:00

rzg2l-cpg.h

clk: renesas: r8a08g045: Check the source of the CPU PLL settings

2025-02-03 11:07:06 +01:00

rzv2h-cpg.c

clk: renesas: rzv2h: Adjust for CPG_BUS_m_MSTOP starting from m = 1

2025-03-06 16:38:19 +01:00

rzv2h-cpg.h

clk: renesas: r9a09g057: Add entries for the DMACs

2025-03-04 09:04:20 +01:00