mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2026-05-14 21:38:46 +02:00
Alexandre Courbot
015b1d3650
The GSP bootloader is a small RISC-V firmware that is loaded by Booter onto the GSP core and is in charge of loading, validating, and starting the actual GSP firmware. It is a regular binary firmware file containing a specific header. Create a type holding the DMA-mapped firmware as well as useful information extracted from the header, and hook it into our firmware structure for later use. The GSP bootloader is stored into the `GspFirmware` structure, since it is part of the GSP firmware package. This makes the `Firmware` structure empty, so remove it. Reviewed-by: John Hubbard <jhubbard@nvidia.com> Acked-by: Danilo Krummrich <dakr@kernel.org> Link: https://lore.kernel.org/r/20250913-nova_firmware-v6-8-9007079548b0@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
92 lines
2.7 KiB
Rust
92 lines
2.7 KiB
Rust
// SPDX-License-Identifier: GPL-2.0
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//! Support for firmware binaries designed to run on a RISC-V core. Such firmwares files have a
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//! dedicated header.
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use core::mem::size_of;
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use kernel::device;
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use kernel::firmware::Firmware;
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use kernel::prelude::*;
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use kernel::transmute::FromBytes;
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use crate::dma::DmaObject;
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use crate::firmware::BinFirmware;
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/// Descriptor for microcode running on a RISC-V core.
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#[repr(C)]
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#[derive(Debug)]
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struct RmRiscvUCodeDesc {
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version: u32,
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bootloader_offset: u32,
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bootloader_size: u32,
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bootloader_param_offset: u32,
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bootloader_param_size: u32,
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riscv_elf_offset: u32,
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riscv_elf_size: u32,
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app_version: u32,
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manifest_offset: u32,
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manifest_size: u32,
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monitor_data_offset: u32,
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monitor_data_size: u32,
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monitor_code_offset: u32,
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monitor_code_size: u32,
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}
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// SAFETY: all bit patterns are valid for this type, and it doesn't use interior mutability.
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unsafe impl FromBytes for RmRiscvUCodeDesc {}
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impl RmRiscvUCodeDesc {
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/// Interprets the header of `bin_fw` as a [`RmRiscvUCodeDesc`] and returns it.
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///
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/// Fails if the header pointed at by `bin_fw` is not within the bounds of the firmware image.
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fn new(bin_fw: &BinFirmware<'_>) -> Result<Self> {
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let offset = bin_fw.hdr.header_offset as usize;
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bin_fw
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.fw
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.get(offset..offset + size_of::<Self>())
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.and_then(Self::from_bytes_copy)
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.ok_or(EINVAL)
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}
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}
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/// A parsed firmware for a RISC-V core, ready to be loaded and run.
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#[expect(unused)]
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pub(crate) struct RiscvFirmware {
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/// Offset at which the code starts in the firmware image.
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code_offset: u32,
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/// Offset at which the data starts in the firmware image.
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data_offset: u32,
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/// Offset at which the manifest starts in the firmware image.
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manifest_offset: u32,
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/// Application version.
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app_version: u32,
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/// Device-mapped firmware image.
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ucode: DmaObject,
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}
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impl RiscvFirmware {
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/// Parses the RISC-V firmware image contained in `fw`.
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pub(crate) fn new(dev: &device::Device<device::Bound>, fw: &Firmware) -> Result<Self> {
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let bin_fw = BinFirmware::new(fw)?;
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let riscv_desc = RmRiscvUCodeDesc::new(&bin_fw)?;
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let ucode = {
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let start = bin_fw.hdr.data_offset as usize;
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let len = bin_fw.hdr.data_size as usize;
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DmaObject::from_data(dev, fw.data().get(start..start + len).ok_or(EINVAL)?)?
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};
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Ok(Self {
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ucode,
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code_offset: riscv_desc.monitor_code_offset,
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data_offset: riscv_desc.monitor_data_offset,
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manifest_offset: riscv_desc.manifest_offset,
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app_version: riscv_desc.app_version,
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})
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}
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}
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