Dinh Nguyen f450f28e70 reset: socfpga: fix for 64-bit compilation ...

The SoCFPGA Stratix10 reset controller has 32-bit registers. Thus, we
cannot use BITS_PER_LONG in computing the register and bit offset. Instead,
we should be using the width of the hardware register for the calculation.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

2017-10-04 10:29:44 +02:00

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hisilicon

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sti

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tegra

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core.c

reset: make (de)assert report success for self-deasserting reset drivers

2017-07-19 12:10:48 +02:00

Kconfig

reset: Restrict RESET_HSDK to ARC_SOC_HSDK or COMPILE_TEST

2017-09-21 12:44:01 +02:00

Makefile

ARC: reset: remove the misleading v1 suffix all over

2017-09-18 13:02:03 +02:00

reset-a10sr.c

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reset-ath79.c

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reset-berlin.c

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reset-hsdk.c

ARC: reset: remove the misleading v1 suffix all over

2017-09-18 13:02:03 +02:00

reset-imx7.c

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reset-lantiq.c

reset: Add a reset controller driver for the Lantiq XWAY based SoCs

2017-09-04 21:19:02 +02:00

reset-lpc18xx.c

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reset-meson.c

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reset-oxnas.c

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reset-pistachio.c

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reset-socfpga.c

reset: socfpga: fix for 64-bit compilation

2017-10-04 10:29:44 +02:00

reset-stm32.c

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reset-sunxi.c

reset: sunxi: fix number of reset lines

2017-08-11 17:48:56 +02:00

reset-ti-sci.c

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reset-ti-syscon.c

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reset-uniphier.c

reset: uniphier: add analog amplifiers reset control

2017-08-14 09:29:47 +02:00

reset-zx2967.c

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reset-zynq.c

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