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Akhil P Oommen ea48293df4 drm/msm/a6xx: Fix GMU firmware parser

[ Upstream commit b4789aac9d ]

Current parser logic for GMU firmware assumes a dword aligned payload
size for every block. This is not true for all GMU firmwares. So, fix
this by using correct 'size' value in the calculation for the offset
for the next block's header.

Fixes: c6ed04f856 ("drm/msm/a6xx: A640/A650 GMU firmware path")
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/674040/
Message-ID: <20250911-assorted-sept-1-v2-2-a8bf1ee20792@oss.qualcomm.com>
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

2025-12-07 06:09:13 +09:00

adreno

drm/msm/a6xx: Fix GMU firmware parser

2025-12-07 06:09:13 +09:00

disp

drm/msm/dpu: don't select single flush for active CTL blocks

2025-06-27 11:05:30 +01:00

…

dsi

drm/msm/dsi/dsi_phy_10nm: Fix missing initial VCO rate

2025-06-27 11:05:35 +01:00

edp