Rob Herring c0b736d3b5 ARM: l2x0: Add explicit includes for init and types ...

The cache-l2x0.h header uses u32 type and the __init and __iomem
attributes, so it should have explicit includes for those.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230803-dt-header-cleanups-for-soc-v2-1-d8de2cc88bff@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

2023-08-12 10:30:54 +02:00

..

cache-aurora-l2.h

treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 1)

2022-06-10 14:51:35 +02:00

cache-b15-rac.h

…

cache-feroceon-l2.h

treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 1)

2022-06-10 14:51:35 +02:00

cache-l2x0.h

ARM: l2x0: Add explicit includes for init and types

2023-08-12 10:30:54 +02:00

cache-tauros2.h

treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 1)

2022-06-10 14:51:35 +02:00

cache-uniphier.h

…

cp14.h

…

dec21285.h

ARM: footbridge: remove custom DMA address handling

2022-09-15 15:59:16 +02:00

ioc.h

…

iomd.h

…

locomo.h

ARM: 9049/1: locomo: make locomo bus's remove callback return void

2021-02-01 19:44:30 +00:00

memc.h

…

sa1111.h

ARM: pxa: remove unused mach/bitfield.h

2022-05-07 22:56:16 +02:00

scoop.h

…

ssp.h

…