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All am65-cpsw controllers have a fixed TX delay, so the PHY interface mode must be fixed up to account for this. Modes that claim to a delay on the PCB can't actually work. Warn people to update their Device Trees if one of the unsupported modes is specified. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://patch.msgid.link/9b3fb1fbf719bef30702192155c6413cd5de5dcf.1750756583.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>