Dmitry Osipenko ce2785a75d iommu/tegra: gart: Integrate with Memory Controller driver ...

The device-tree binding has been changed. There is no separate GART device
anymore, it is squashed into the Memory Controller. Integrate GART module
with the MC in a way it is done for the SMMU on Tegra30+.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>

2019-01-16 13:54:12 +01:00

..

arc

ARC: mcip: update MCIP debug mask when the new cpu came online

2018-02-28 10:45:31 -08:00

at91

clk: at91: utmi: set the mainck rate

2017-11-01 23:39:49 -07:00

bcm2835

firmware: raspberrypi: Switch to SPDX identifier

2018-11-21 14:33:11 +01:00

brcmstb

…

fsl

soc: fsl: dpio: Add BP and FQ query APIs

2018-12-19 10:37:22 -08:00

imx

…

mediatek

iommu/mediatek: Add mt2712 IOMMU support

2017-08-22 16:37:58 +02:00

mscc

net: mscc: ocelot: simplify register access for PLL5 configuration

2018-10-05 14:36:44 -07:00

nps

soc: Support for NPS HW scheduling

2016-11-30 11:54:25 -08:00

qcom

soc: qcom: cmd-db: Stop memcpy()ing in cmd_db_read_aux_data()

2018-11-14 10:06:24 -08:00

rockchip

soc: rockchip: add header for ddr rate SIP interface

2016-08-31 18:53:24 +02:00

sa1100

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tegra

iommu/tegra: gart: Integrate with Memory Controller driver

2019-01-16 13:54:12 +01:00