Xiaojie Yuan 87190edcf3 drm/amdgpu: add CGTT_GS_NGG_CLK_CTRL register to gc header ...

gc 10.1.2 introduced this new register

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2019-08-02 10:30:40 -05:00

..

gc_9_0_default.h

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gc_9_0_offset.h

drm/amd/include: add define of TCP_EDC_CNT_NEW

2019-07-31 14:50:54 -05:00

gc_9_0_sh_mask.h

drm/amd/include: add bitfield define for EDC registers

2019-07-31 14:50:47 -05:00

gc_9_1_offset.h

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gc_9_1_sh_mask.h

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gc_9_2_1_offset.h

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gc_9_2_1_sh_mask.h

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gc_10_1_0_default.h

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gc_10_1_0_offset.h

drm/amdgpu: add CGTT_GS_NGG_CLK_CTRL register to gc header

2019-08-02 10:30:40 -05:00

gc_10_1_0_sh_mask.h

drm/amdgpu: add CGTT_GS_NGG_CLK_CTRL register to gc header

2019-08-02 10:30:40 -05:00