Carolina Jubran b503f0045f net/mlx5: Add missing masks and QoS bit masks for scheduling elements ...

[ Upstream commit 452ef7f860 ]

Add the missing masks for supported element types and Transmit
Scheduling Arbiter (TSAR) types in scheduling elements.

Also, add the corresponding bit masks for these types in the QoS
capabilities of a NIC scheduler.

Fixes: 214baf2287 ("net/mlx5e: Support HTB offload")
Signed-off-by: Carolina Jubran <cjubran@nvidia.com>
Reviewed-by: Cosmin Ratiu <cratiu@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

2024-10-17 15:10:36 +02:00

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accel.h

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cq.h

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device.h

net/mlx5: Add IFC bits and enums for flow meter

2024-10-17 15:10:36 +02:00

doorbell.h

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driver.h

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eq.h

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eswitch.h

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fs_helpers.h

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fs.h

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mlx5_ifc_fpga.h

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mlx5_ifc_vdpa.h

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mlx5_ifc.h

net/mlx5: Add missing masks and QoS bit masks for scheduling elements

2024-10-17 15:10:36 +02:00

mpfs.h

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port.h

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qp.h

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rsc_dump.h

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transobj.h

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vport.h

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