Russ Weight a78a51a851 fpga: dfl: pci: add DID for D5005 PAC cards ...

This patch adds the approved PCI Express Device IDs for the
PF and VF for the card for D5005 PAC cards.

Signed-off-by: Russ Weight <russell.h.weight@intel.com>
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Moritz Fischer <mdf@kernel.org>

2021-04-05 17:46:56 -07:00

..

altera-cvp.c

fpga: altera-cvp: Add Stratix10 (V2) Support

2019-08-24 11:38:29 -07:00

altera-fpga2sdram.c

fpga: bridge: add devm_fpga_bridge_create

2018-10-16 11:13:50 +02:00

altera-freeze-bridge.c

fpga: bridge: add devm_fpga_bridge_create

2018-10-16 11:13:50 +02:00

altera-hps2fpga.c

fpga: bridge: add devm_fpga_bridge_create

2018-10-16 11:13:50 +02:00

altera-pr-ip-core-plat.c

fpga: fpga-mgr: altera-pr-ip: Simplify registration

2020-12-01 18:49:32 +01:00

altera-pr-ip-core.c

fpga: fpga-mgr: altera-pr-ip: Simplify registration

2020-12-01 18:49:32 +01:00

altera-ps-spi.c

fpga: fpga-mgr: altera-ps-spi: Simplify registration

2020-12-01 18:49:32 +01:00

dfl-afu-dma-region.c

fpga: dfl: afu: convert get_user_pages() --> pin_user_pages()

2020-06-18 18:12:06 -07:00

dfl-afu-error.c

fpga: dfl: afu: harden port enable logic

2021-03-24 11:15:04 -07:00

dfl-afu-main.c

fpga: dfl: afu: harden port enable logic

2021-03-24 11:15:04 -07:00

dfl-afu-region.c

…

dfl-afu.h

fpga: dfl: afu: harden port enable logic

2021-03-24 11:15:04 -07:00

dfl-fme-br.c

fpga: bridge: add devm_fpga_bridge_create

2018-10-16 11:13:50 +02:00

dfl-fme-error.c

fpga: dfl: fme: add interrupt support for global error reporting

2020-07-06 21:35:42 -07:00

dfl-fme-main.c

fpga: dfl: fme: add interrupt support for global error reporting

2020-07-06 21:35:42 -07:00

dfl-fme-mgr.c

fpga: fpga-mgr: dfl-fme-mgr: Simplify registration

2020-12-01 18:49:32 +01:00

dfl-fme-perf.c

fpga: dfl: fme: Constify static attribute_group structs

2021-01-10 10:57:14 -08:00

dfl-fme-pr.c

drivers/fpga/dfl-fme-pr.c: get rid of pointless access_ok()

2020-05-29 11:04:56 -04:00

dfl-fme-pr.h

…

dfl-fme-region.c

fpga: dfl-fme-region: Use platform_get_drvdata()

2018-11-26 20:47:10 +01:00

dfl-fme.h

fpga: dfl: fme: add performance reporting support

2020-04-28 15:49:28 +02:00

dfl-n3000-nios.c

fpga: dfl: add support for N3000 Nios private feature

2021-01-07 15:21:27 +01:00

dfl-pci.c

fpga: dfl: pci: add DID for D5005 PAC cards

2021-04-05 17:46:56 -07:00

dfl.c

fpga: dfl: move dfl bus related APIs to include/linux/dfl.h

2021-01-07 15:21:27 +01:00

dfl.h

fpga: dfl: move dfl bus related APIs to include/linux/dfl.h

2021-01-07 15:21:27 +01:00

fpga-bridge.c

fpga: Use DEFINE_SPINLOCK() for spinlock

2021-01-10 10:57:13 -08:00

fpga-mgr.c

fpga: fpga-mgr: Add devm_fpga_mgr_register() API

2020-12-01 18:49:32 +01:00

fpga-region.c

fpga: fpga-region: Cleanup an outdated comment

2020-09-04 20:27:45 -07:00

ice40-spi.c

fpga: fpga-mgr: ice40-spi: Simplify registration

2020-12-01 18:49:32 +01:00

Kconfig

fpga: Add support for Xilinx DFX AXI Shutdown manager

2021-03-06 07:54:40 -08:00

machxo2-spi.c

fpga: fpga-mgr: machxo2-spi: Simplify registration

2020-12-01 18:49:32 +01:00

Makefile

fpga: dfl: add support for N3000 Nios private feature

2021-01-07 15:21:27 +01:00

of-fpga-region.c

drivers: Add generic helper to match by of_node

2019-06-24 05:22:31 +02:00

socfpga-a10.c

fpga: mgr: add devm_fpga_mgr_create

2018-10-16 11:13:50 +02:00

socfpga.c

fpga: fpga-mgr: socfpga: Simplify registration

2020-12-01 18:49:32 +01:00

stratix10-soc.c

fpga: stratix10-soc: make FPGA task un-interruptible

2020-08-19 21:05:46 -07:00

ts73xx-fpga.c

fpga: fpga-mgr: ts73xx: Simplify registration

2020-12-01 18:49:32 +01:00

xilinx-pr-decoupler.c

fpga: Add support for Xilinx DFX AXI Shutdown manager

2021-03-06 07:54:40 -08:00

xilinx-spi.c

fpga: fpga-mgr: xilinx-spi: fix error messages on -EPROBE_DEFER

2021-03-06 07:39:17 -08:00

zynq-fpga.c

fpga: zynq: Remove clk_get error message for probe defer

2020-03-30 20:45:21 -07:00

zynqmp-fpga.c

fpga: fpga-mgr: zynqmp: Simplify registration

2020-12-01 18:49:32 +01:00