Serhii Pievniev 29af688c45 tools/power/turbostat: Fix microcode patch level output for AMD/Hygon ...

[ Upstream commit a444083286 ]

turbostat always used the same logic to read the microcode patch level,
which is correct for Intel but not for AMD/Hygon.
While Intel stores the patch level in the upper 32 bits of MSR, AMD
stores it in the lower 32 bits, which causes turbostat to report the
microcode version as 0x0 on AMD/Hygon.

Fix by shifting right by 32 for non-AMD/Hygon, preserving the existing
behavior for Intel and unknown vendors.

Fixes: 3e4048466c ("tools/power turbostat: Add --no-msr option")
Signed-off-by: Serhii Pievniev <spevnev16@gmail.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

2026-04-22 13:18:50 +02:00

..

acpi

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cpupower

tools/power cpupower: Reset errno before strtoull()

2026-03-04 07:20:53 -05:00

pm-graph

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x86

tools/power/turbostat: Fix microcode patch level output for AMD/Hygon

2026-04-22 13:18:50 +02:00