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This patch is analogous to the previous sync file export patch in that it allows you to import a sync_file into a dma-buf. Unlike the previous patch, however, this does add genuinely new functionality to dma-buf. Without this, the only way to attach a sync_file to a dma-buf is to submit a batch to your driver of choice which waits on the sync_file and claims to write to the dma-buf. Even if said batch is a no-op, a submit is typically way more overhead than just attaching a fence. A submit may also imply extra synchronization with other work because it happens on a hardware queue. In the Vulkan world, this is useful for dealing with the out-fence from vkQueuePresent. Current Linux window-systems (X11, Wayland, etc.) all rely on dma-buf implicit sync. Since Vulkan is an explicit sync API, we get a set of fences (VkSemaphores) in vkQueuePresent and have to stash those as an exclusive (write) fence on the dma-buf. We handle it in Mesa today with the above mentioned dummy submit trick. This ioctl would allow us to set it directly without the dummy submit. This may also open up possibilities for GPU drivers to move away from implicit sync for their kernel driver uAPI and instead provide sync files and rely on dma-buf import/export for communicating with other implicit sync clients. We make the explicit choice here to only allow setting RW fences which translates to an exclusive fence on the dma_resv. There's no use for read-only fences for communicating with other implicit sync userspace and any such attempts are likely to be racy at best. When we got to insert the RW fence, the actual fence we set as the new exclusive fence is a combination of the sync_file provided by the user and all the other fences on the dma_resv. This ensures that the newly added exclusive fence will never signal before the old one would have and ensures that we don't break any dma_resv contracts. We require userspace to specify RW in the flags for symmetry with the export ioctl and in case we ever want to support read fences in the future. There is one downside here that's worth documenting: If two clients writing to the same dma-buf using this API race with each other, their actions on the dma-buf may happen in parallel or in an undefined order. Both with and without this API, the pattern is the same: Collect all the fences on dma-buf, submit work which depends on said fences, and then set a new exclusive (write) fence on the dma-buf which depends on said work. The difference is that, when it's all handled by the GPU driver's submit ioctl, the three operations happen atomically under the dma_resv lock. If two userspace submits race, one will happen before the other. You aren't guaranteed which but you are guaranteed that they're strictly ordered. If userspace manages the fences itself, then these three operations happen separately and the two render operations may happen genuinely in parallel or get interleaved. However, this is a case of userspace racing with itself. As long as we ensure userspace can't back the kernel into a corner, it should be fine. v2 (Jason Ekstrand): - Use a wrapper dma_fence_array of all fences including the new one when importing an exclusive fence. v3 (Jason Ekstrand): - Lock around setting shared fences as well as exclusive - Mark SIGNAL_SYNC_FILE as a read-write ioctl. - Initialize ret to 0 in dma_buf_wait_sync_file v4 (Jason Ekstrand): - Use the new dma_resv_get_singleton helper v5 (Jason Ekstrand): - Rename the IOCTLs to import/export rather than wait/signal - Drop the WRITE flag and always get/set the exclusive fence v6 (Jason Ekstrand): - Split import and export into separate patches - New commit message v7 (Daniel Vetter): - Fix the uapi header to use the right struct in the ioctl - Use a separate dma_buf_import_sync_file struct - Add kerneldoc for dma_buf_import_sync_file v8 (Jason Ekstrand): - Rebase on Christian König's fence rework v9 (Daniel Vetter): - Fix -EINVAL checks for the flags parameter - Add documentation about read/write fences - Add documentation about the expected usage of import/export and specifically call out the possible userspace race. v10 (Simon Ser): - Fix a typo in the docs Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com> Signed-off-by: Jason Ekstrand <jason.ekstrand@collabora.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Simon Ser <contact@emersion.fr> Link: https://patchwork.freedesktop.org/patch/msgid/20220608152142.14495-3-jason@jlekstrand.net
183 lines
7.1 KiB
C
183 lines
7.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* Framework for buffer objects that can be shared across devices/subsystems.
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*
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* Copyright(C) 2015 Intel Ltd
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _DMA_BUF_UAPI_H_
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#define _DMA_BUF_UAPI_H_
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#include <linux/types.h>
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/**
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* struct dma_buf_sync - Synchronize with CPU access.
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*
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* When a DMA buffer is accessed from the CPU via mmap, it is not always
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* possible to guarantee coherency between the CPU-visible map and underlying
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* memory. To manage coherency, DMA_BUF_IOCTL_SYNC must be used to bracket
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* any CPU access to give the kernel the chance to shuffle memory around if
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* needed.
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*
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* Prior to accessing the map, the client must call DMA_BUF_IOCTL_SYNC
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* with DMA_BUF_SYNC_START and the appropriate read/write flags. Once the
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* access is complete, the client should call DMA_BUF_IOCTL_SYNC with
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* DMA_BUF_SYNC_END and the same read/write flags.
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*
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* The synchronization provided via DMA_BUF_IOCTL_SYNC only provides cache
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* coherency. It does not prevent other processes or devices from
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* accessing the memory at the same time. If synchronization with a GPU or
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* other device driver is required, it is the client's responsibility to
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* wait for buffer to be ready for reading or writing before calling this
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* ioctl with DMA_BUF_SYNC_START. Likewise, the client must ensure that
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* follow-up work is not submitted to GPU or other device driver until
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* after this ioctl has been called with DMA_BUF_SYNC_END?
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*
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* If the driver or API with which the client is interacting uses implicit
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* synchronization, waiting for prior work to complete can be done via
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* poll() on the DMA buffer file descriptor. If the driver or API requires
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* explicit synchronization, the client may have to wait on a sync_file or
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* other synchronization primitive outside the scope of the DMA buffer API.
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*/
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struct dma_buf_sync {
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/**
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* @flags: Set of access flags
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*
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* DMA_BUF_SYNC_START:
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* Indicates the start of a map access session.
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*
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* DMA_BUF_SYNC_END:
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* Indicates the end of a map access session.
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*
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* DMA_BUF_SYNC_READ:
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* Indicates that the mapped DMA buffer will be read by the
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* client via the CPU map.
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*
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* DMA_BUF_SYNC_WRITE:
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* Indicates that the mapped DMA buffer will be written by the
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* client via the CPU map.
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*
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* DMA_BUF_SYNC_RW:
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* An alias for DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE.
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*/
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__u64 flags;
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};
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#define DMA_BUF_SYNC_READ (1 << 0)
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#define DMA_BUF_SYNC_WRITE (2 << 0)
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#define DMA_BUF_SYNC_RW (DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE)
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#define DMA_BUF_SYNC_START (0 << 2)
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#define DMA_BUF_SYNC_END (1 << 2)
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#define DMA_BUF_SYNC_VALID_FLAGS_MASK \
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(DMA_BUF_SYNC_RW | DMA_BUF_SYNC_END)
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#define DMA_BUF_NAME_LEN 32
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/**
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* struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
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*
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* Userspace can perform a DMA_BUF_IOCTL_EXPORT_SYNC_FILE to retrieve the
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* current set of fences on a dma-buf file descriptor as a sync_file. CPU
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* waits via poll() or other driver-specific mechanisms typically wait on
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* whatever fences are on the dma-buf at the time the wait begins. This
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* is similar except that it takes a snapshot of the current fences on the
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* dma-buf for waiting later instead of waiting immediately. This is
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* useful for modern graphics APIs such as Vulkan which assume an explicit
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* synchronization model but still need to inter-operate with dma-buf.
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*
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* The intended usage pattern is the following:
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*
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* 1. Export a sync_file with flags corresponding to the expected GPU usage
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* via DMA_BUF_IOCTL_EXPORT_SYNC_FILE.
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*
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* 2. Submit rendering work which uses the dma-buf. The work should wait on
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* the exported sync file before rendering and produce another sync_file
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* when complete.
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*
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* 3. Import the rendering-complete sync_file into the dma-buf with flags
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* corresponding to the GPU usage via DMA_BUF_IOCTL_IMPORT_SYNC_FILE.
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*
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* Unlike doing implicit synchronization via a GPU kernel driver's exec ioctl,
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* the above is not a single atomic operation. If userspace wants to ensure
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* ordering via these fences, it is the respnosibility of userspace to use
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* locks or other mechanisms to ensure that no other context adds fences or
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* submits work between steps 1 and 3 above.
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*/
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struct dma_buf_export_sync_file {
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/**
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* @flags: Read/write flags
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*
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* Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
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*
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* If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
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* the returned sync file waits on any writers of the dma-buf to
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* complete. Waiting on the returned sync file is equivalent to
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* poll() with POLLIN.
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*
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* If DMA_BUF_SYNC_WRITE is set, the returned sync file waits on
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* any users of the dma-buf (read or write) to complete. Waiting
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* on the returned sync file is equivalent to poll() with POLLOUT.
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* If both DMA_BUF_SYNC_WRITE and DMA_BUF_SYNC_READ are set, this
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* is equivalent to just DMA_BUF_SYNC_WRITE.
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*/
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__u32 flags;
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/** @fd: Returned sync file descriptor */
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__s32 fd;
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};
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/**
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* struct dma_buf_import_sync_file - Insert a sync_file into a dma-buf
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*
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* Userspace can perform a DMA_BUF_IOCTL_IMPORT_SYNC_FILE to insert a
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* sync_file into a dma-buf for the purposes of implicit synchronization
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* with other dma-buf consumers. This allows clients using explicitly
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* synchronized APIs such as Vulkan to inter-op with dma-buf consumers
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* which expect implicit synchronization such as OpenGL or most media
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* drivers/video.
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*/
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struct dma_buf_import_sync_file {
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/**
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* @flags: Read/write flags
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*
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* Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
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*
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* If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
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* this inserts the sync_file as a read-only fence. Any subsequent
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* implicitly synchronized writes to this dma-buf will wait on this
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* fence but reads will not.
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*
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* If DMA_BUF_SYNC_WRITE is set, this inserts the sync_file as a
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* write fence. All subsequent implicitly synchronized access to
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* this dma-buf will wait on this fence.
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*/
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__u32 flags;
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/** @fd: Sync file descriptor */
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__s32 fd;
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};
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#define DMA_BUF_BASE 'b'
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#define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
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/* 32/64bitness of this uapi was botched in android, there's no difference
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* between them in actual uapi, they're just different numbers.
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*/
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#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *)
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#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32)
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#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64)
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#define DMA_BUF_IOCTL_EXPORT_SYNC_FILE _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file)
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#define DMA_BUF_IOCTL_IMPORT_SYNC_FILE _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file)
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#endif
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