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Files

Yong Zhao 15426dbb65 drm/amdkfd: Change the control stack MTYPE from UC to NC on GFX9

CWSR fails on Raven if the control stack is MTYPE_UC, which is used
for regular GART mappings. As a workaround we map it using MTYPE_NC.

The MEC firmware expects the control stack at one page offset from the
start of the MQD so it is part of the MQD allocation on GFXv9. AMDGPU
added a memory allocation flag just for this purpose.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2018-09-20 10:25:17 -05:00

asic_reg

drm/amdgpu: add more jpeg register offset headers

2018-06-15 12:20:35 -05:00

ivsrcid

drm/amd: Add interrupt source definitions for SOC15 v3.

2018-07-13 14:45:37 -05:00

linux

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amd_acpi.h

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amd_pcie_helpers.h