Files
Bjorn Helgaas 39195990e4 PCI: Correct PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 value
fb82437fdd ("PCI: Change capability register offsets to hex") incorrectly
converted the PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 value from decimal 52 to hex
0x32:

  -#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 52      /* v2 endpoints with link end here */
  +#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 0x32    /* end of v2 EPs w/ link */

This broke PCI capabilities in a VMM because subsequent ones weren't
DWORD-aligned.

Change PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 to the correct value of 0x34.

fb82437fdd was from Baruch Siach <baruch@tkos.co.il>, but this was not
Baruch's fault; it's a mistake I made when applying the patch.

Fixes: fb82437fdd ("PCI: Change capability register offsets to hex")
Reported-by: David Woodhouse <dwmw2@infradead.org>
Closes: https://lore.kernel.org/all/3ae392a0158e9d9ab09a1d42150429dd8ca42791.camel@infradead.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2026-02-27 10:24:25 -06:00
..
2026-01-18 11:22:53 -05:00
2025-10-28 22:59:19 +01:00
2025-11-25 19:20:42 -08:00
2025-09-05 09:11:28 +02:00
2025-11-24 17:52:11 +01:00
2025-11-24 17:52:11 +01:00
2025-11-29 21:39:58 +09:00
2025-12-23 12:29:14 +05:30
2025-12-18 21:34:42 -08:00
2025-09-15 14:32:54 +02:00
2026-01-12 16:52:09 +01:00
2026-01-16 19:21:40 +01:00
2026-02-06 20:35:06 -08:00
2025-11-03 17:41:18 +01:00
2025-10-30 14:25:14 +01:00
2025-11-25 19:20:42 -08:00
2026-01-26 19:07:10 -08:00
2026-02-09 12:21:32 -05:00
2025-09-22 09:29:28 +01:00
2025-11-30 18:02:43 -05:00
2025-09-22 09:29:29 +01:00