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Verify SIL modules at the beginning and at the end of the SIL optimization pipelines, if -sil-verify-all is provided
Till now, a SIL module would be only verified if an optimization has changed it. But if there were no changes, then no verification would happen and some SIL module format errors would stay unnoticed. This was happening in certain cases when reading a textual SIL module representation, which turned out to be broken, but SIL verifier wouldn't catch it. Swift SVN r31863
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@@ -150,9 +150,6 @@ static llvm::cl::opt<unsigned>
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ASTVerifierProcessId("ast-verifier-process-id", llvm::cl::Hidden,
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llvm::cl::init(1));
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static llvm::cl::opt<bool>
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PerformWMO("wmo", llvm::cl::desc("Enable whole-module optimizations"));
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static void runCommandLineSelectedPasses(SILModule *Module) {
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SILPassManager PM(Module);
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@@ -256,20 +253,8 @@ int main(int argc, char **argv) {
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PrintingDiagnosticConsumer PrintDiags;
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CI.addDiagnosticConsumer(&PrintDiags);
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if (!PerformWMO) {
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auto &FrontendOpts = Invocation.getFrontendOptions();
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if (!InputFilename.empty() && InputFilename != "-") {
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FrontendOpts.PrimaryInput = SelectedInput(
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FrontendOpts.InputFilenames.size());
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} else {
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FrontendOpts.PrimaryInput = SelectedInput(
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FrontendOpts.InputBuffers.size(), SelectedInput::InputKind::Buffer);
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}
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}
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if (CI.setup(Invocation))
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return 1;
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CI.performSema();
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// If parsing produced an error, don't run any passes.
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