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Change 6 non-exhaustive switches on ValueKind to be exhaustive switches on TermKind. NFC.

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This exposed the first interesting bug found by using TermKind, in DCE we were
not properly handling switch_enum_addr and checked_cast_addr_br.

SR-335
rdar://23980060
This commit is contained in:
Michael Gottesman
2015-12-21 16:52:03 -06:00
parent bc6583630c
commit 3eca15623b
5 changed files with 97 additions and 94 deletions
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54
lib/SILOptimizer/Transforms/DeadCodeElimination.cpp
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@@ -280,18 +280,22 @@ void DCE::markTerminatorArgsLive(SILBasicBlock *Pred,
// delivers those arguments.
markValueLive(Term);
switch (Term->getKind()) {
default:
switch (Term->getTermKind()) {
case TermKind::ReturnInst:
case TermKind::ThrowInst:
case TermKind::SwitchEnumAddrInst:
case TermKind::CheckedCastAddrBranchInst:
case TermKind::Invalid:
llvm_unreachable("Unexpected terminator kind!");
case ValueKind::UnreachableInst:
case ValueKind::SwitchValueInst:
case TermKind::UnreachableInst:
case TermKind::SwitchValueInst:
llvm_unreachable("Unexpected argument for terminator kind!");
break;
case ValueKind::DynamicMethodBranchInst:
case ValueKind::SwitchEnumInst:
case ValueKind::CheckedCastBranchInst:
case TermKind::DynamicMethodBranchInst:
case TermKind::SwitchEnumInst:
case TermKind::CheckedCastBranchInst:
assert(ArgIndex == 0 && "Expected a single argument!");
// We do not need to do anything with these. If the resulting
@@ -300,11 +304,11 @@ void DCE::markTerminatorArgsLive(SILBasicBlock *Pred,
// single operand of these instructions as live.
break;
case ValueKind::BranchInst:
case TermKind::BranchInst:
markValueLive(cast<BranchInst>(Term)->getArg(ArgIndex).getDef());
break;
case ValueKind::CondBranchInst: {
case TermKind::CondBranchInst: {
auto *CondBr = cast<CondBranchInst>(Term);
if (CondBr->getTrueBB() == Succ) {
@@ -319,7 +323,7 @@ void DCE::markTerminatorArgsLive(SILBasicBlock *Pred,
break;
}
case ValueKind::TryApplyInst: {
case TermKind::TryApplyInst: {
assert(ArgIndex == 0 && "Expect a single argument!");
break;
}
@@ -366,33 +370,31 @@ void DCE::propagateLiveness(SILInstruction *I) {
return;
}
switch (I->getKind()) {
#define TERMINATOR(ID, PARENT, MEM, RELEASE)
#define VALUE(ID, PARENT) case ValueKind::ID:
#include "swift/SIL/SILNodes.def"
switch (ValueKindAsTermKind(I->getKind())) {
case TermKind::Invalid:
llvm_unreachable("Unexpected terminator instruction!");
case ValueKind::BranchInst:
case ValueKind::UnreachableInst:
case TermKind::BranchInst:
case TermKind::UnreachableInst:
return;
case ValueKind::ReturnInst:
case ValueKind::ThrowInst:
case ValueKind::CondBranchInst:
case ValueKind::SwitchEnumInst:
case ValueKind::SwitchEnumAddrInst:
case ValueKind::DynamicMethodBranchInst:
case ValueKind::CheckedCastBranchInst:
case TermKind::ReturnInst:
case TermKind::ThrowInst:
case TermKind::CondBranchInst:
case TermKind::SwitchEnumInst:
case TermKind::SwitchEnumAddrInst:
case TermKind::DynamicMethodBranchInst:
case TermKind::CheckedCastBranchInst:
markValueLive(I->getOperand(0).getDef());
return;
case ValueKind::TryApplyInst:
case ValueKind::SwitchValueInst:
case TermKind::TryApplyInst:
case TermKind::SwitchValueInst:
for (auto &O : I->getAllOperands())
markValueLive(O.get().getDef());
return;
case ValueKind::CheckedCastAddrBranchInst:
case TermKind::CheckedCastAddrBranchInst:
markValueLive(I->getOperand(0).getDef());
markValueLive(I->getOperand(1).getDef());
return;