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Split the RCIdentityAnalysis analysis to allow per-function invalidation.

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Before the change the RCIdentityAnalysis kept a single map that contained
the module's RC information. When function passes needed to invalidate the
analysis they had to clear the RC information for the entire module. The
problem was mitigated by the fact that we process one function at a time, and
we start processing a new function less frequently.

II adopted the DominanceAnalysis structure. We should probably implement
this functionality as CRTP.

Swift SVN r26636
This commit is contained in:
Nadav Rotem
2015-03-27 16:55:36 +00:00
parent f3c3576134
commit f0fa502d56
13 changed files with 99 additions and 71 deletions
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4
lib/SILAnalysis/GlobalARCSequenceDataflow.cpp
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@@ -68,7 +68,7 @@ using ARCBBStateInfoHandle = ARCSequenceDataflowEvaluator::ARCBBStateInfoHandle;
static bool processBBTopDown(
ARCBBState &BBState,
BlotMapVector<SILInstruction *, TopDownRefCountState> &DecToIncStateMap,
AliasAnalysis *AA, RCIdentityAnalysis *RCIA) {
AliasAnalysis *AA, RCIdentityFunctionInfo *RCIA) {
DEBUG(llvm::dbgs() << ">>>> Top Down!\n");
SILBasicBlock &BB = BBState.getBB();
@@ -525,7 +525,7 @@ bool ARCSequenceDataflowEvaluator::processBottomUp(
ARCSequenceDataflowEvaluator::ARCSequenceDataflowEvaluator(
SILFunction &F, AliasAnalysis *AA, PostOrderAnalysis *POA,
RCIdentityAnalysis *RCIA,
RCIdentityFunctionInfo *RCIA,
BlotMapVector<SILInstruction *, TopDownRefCountState> &DecToIncStateMap,
BlotMapVector<SILInstruction *, BottomUpRefCountState> &IncToDecStateMap)
: F(F), AA(AA), POA(POA), RCIA(RCIA), DecToIncStateMap(DecToIncStateMap),