//===--- SIMDSignedInitializers.swift.gyb ---------------------*- swift -*-===// // // This source file is part of the Swift.org open source project // // Copyright (c) 2025 Apple Inc. and the Swift project authors // Licensed under Apache License v2.0 with Runtime Library Exception // // See https://swift.org/LICENSE.txt for license information // See https://swift.org/CONTRIBUTORS.txt for the list of Swift project authors // //===----------------------------------------------------------------------===// // RUN: %empty-directory(%t) // RUN: %gyb %s -o %t/SIMDSignedInitializers.swift // RUN: %target-swift-frontend -primary-file %t/SIMDSignedInitializers.swift -S | %FileCheck %t/SIMDSignedInitializers.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu --check-prefix=CHECKOnone-%target-cpu // RUN: %target-swift-frontend -primary-file %t/SIMDSignedInitializers.swift -S -O | %FileCheck %t/SIMDSignedInitializers.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu --check-prefix=CHECKO-%target-cpu import Swift %for bits in [8,16,32,64]: % for totalBits in [64,128]: % n = totalBits // bits % if n != 1: % neonSuffix = str(n) + {8:'b',16:'h',32:'s',64:'d'}[bits] func repeating${n}_int${bits}(_ scalar: Int${bits}) -> SIMD${n} { SIMD${n}(repeating: scalar) } // CHECK: repeating${n}_int${bits}{{[[:alnum:]]+}}: // CHECKO-arm64-NEXT: dup.${neonSuffix} v0, {{[wx]}}0 // CHECKO-arm64-NEXT: ret // CHECKOnone-arm64: dup.${neonSuffix} // CHECKOnone-arm64: ret % end % end %end func concat8x8(_ a: SIMD8, _ b: SIMD8) -> SIMD16 { SIMD16(lowHalf: a, highHalf: b) } // CHECK: s22SIMDSignedInitializers9concat8x8ys6SIMD16Vys4Int8VGs5SIMD8VyAFG_AJtF: // CHECKO-arm64-NEXT: mov.d v0[1], v1[0] // CHECKO-arm64-NEXT: ret // CHECKO-x86_64: punpcklqdq func concat16x8(_ a: SIMD16, _ b: SIMD16) -> SIMD32 { SIMD32(lowHalf: a, highHalf: b) } // CHECK: s22SIMDSignedInitializers10concat16x8ys6SIMD32Vys4Int8VGs6SIMD16VyAFG_AJtF: // CHECKO-arm64-NEXT: ret func concat4x16(_ a: SIMD4, _ b: SIMD4) -> SIMD8 { SIMD8(lowHalf: a, highHalf: b) } // CHECK: s22SIMDSignedInitializers10concat4x16ys5SIMD8Vys5Int16VGs5SIMD4VyAFG_AJtF: // CHECKO-arm64-NEXT: mov.d v0[1], v1[0] // CHECKO-arm64-NEXT: ret // CHECKO-x86_64: punpcklqdq func concat8x16(_ a: SIMD8, _ b: SIMD8) -> SIMD16 { SIMD16(lowHalf: a, highHalf: b) } // CHECK: s22SIMDSignedInitializers10concat8x16ys6SIMD16Vys5Int16VGs5SIMD8VyAFG_AJtF: // CHECKO-arm64-NEXT: ret func concat2x32(_ a: SIMD2, _ b: SIMD2) -> SIMD4 { SIMD4(lowHalf: a, highHalf: b) } // CHECK: s22SIMDSignedInitializers10concat2x32ys5SIMD4Vys5Int32VGs5SIMD2VyAFG_AJtF: // CHECKO-arm64-NEXT: mov.d v0[1], v1[0] // CHECKO-arm64-NEXT: ret // CHECKO-x86_64: punpcklqdq func concat4x32(_ a: SIMD4, _ b: SIMD4) -> SIMD8 { SIMD8(lowHalf: a, highHalf: b) } // CHECK: s22SIMDSignedInitializers10concat4x32ys5SIMD8Vys5Int32VGs5SIMD4VyAFG_AJtF: // CHECKO-arm64-NEXT: ret func concat2x64(_ a: SIMD2, _ b: SIMD2) -> SIMD4 { SIMD4(lowHalf: a, highHalf: b) } // CHECK: s22SIMDSignedInitializers10concat2x64ys5SIMD4Vys5Int64VGs5SIMD2VyAFG_AJtF: // CHECKO-arm64-NEXT: ret