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760cc57bef
Move the backtracing code into a new Runtime module. This means renaming the Swift Runtime's CMake target because otherwise there will be a name clash. rdar://124913332
143 lines
4.2 KiB
ArmAsm
143 lines
4.2 KiB
ArmAsm
//===--- get-cpu-context.S - Low-level functions to capture registers -----===//
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//
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// This source file is part of the Swift.org open source project
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//
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// Copyright (c) 2022 Apple Inc. and the Swift project authors
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// Licensed under Apache License v2.0 with Runtime Library Exception
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//
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// See https://swift.org/LICENSE.txt for license information
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// See https://swift.org/CONTRIBUTORS.txt for the list of Swift project authors
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//
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//===----------------------------------------------------------------------===//
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//
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// Saves the necessary registers to an appropriate Context structure.
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//
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//===----------------------------------------------------------------------===//
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// On Apple platforms, we need an extra underscore
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#if __APPLE__
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#define FN(x) _##x
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#else
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#define FN(x) x
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#endif
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.text
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.globl FN(_swift_get_cpu_context)
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// .. x86-64 ...................................................................
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#if defined(__x86_64__)
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// On entry, rax contains the pointer to the x86_64_gprs
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FN(_swift_get_cpu_context):
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movq %rax, (%rax)
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movq %rdx, 8(%rax)
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movq %rcx, 16(%rax)
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movq %rbx, 24(%rax)
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movq %rsi, 32(%rax)
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movq %rdi, 40(%rax)
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movq %rbp, 48(%rax)
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leaq 8(%rsp), %rdx
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movq %rdx, 56(%rax)
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movq %r8, 64(%rax)
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movq %r9, 72(%rax)
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movq %r10, 80(%rax)
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movq %r11, 88(%rax)
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movq %r12, 96(%rax)
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movq %r13, 104(%rax)
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movq %r14, 112(%rax)
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movq %r15, 120(%rax)
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pushf
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pop %rdx
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movq %rdx, 128(%rax)
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movw %cs, %dx
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movw %dx, 136(%rax)
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movw %fs, %dx
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movw %dx, 138(%rax)
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movw %gs, %dx
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movw %dx, 140(%rax)
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movq (%rsp), %rdx
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movq %rdx, 144(%rax)
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movq $0x1fffff, 152(%rax)
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ret
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#endif
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// .. i386 .....................................................................
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#if defined(__i386__)
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// On entry, 8(%esp) contains the pointer to the i386_gprs
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FN(_swift_get_cpu_context):
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push %eax
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movl 8(%esp), %eax
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movl %ecx, 4(%eax)
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movl %edx, 8(%eax)
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movl %ebx, 12(%eax)
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movl %esi, 16(%eax)
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movl %edi, 20(%eax)
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movl %ebp, 24(%eax)
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leal 8(%esp), %edx
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movl %edx, 28(%eax)
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pushf
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pop %edx
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movl %edx, 32(%eax)
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movw %ss, %dx
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movw %dx, 36(%eax)
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movw %cs, %dx
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movw %dx, 38(%eax)
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movw %ds, %dx
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movw %dx, 40(%eax)
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movw %es, %dx
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movw %dx, 42(%eax)
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movw %fs, %dx
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movw %dx, 44(%eax)
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movw %gs, %dx
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movw %dx, 46(%eax)
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movl (%esp), %edx
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movl %edx, (%eax)
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movl $0xffff, 48(%eax)
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popl %eax
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ret
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#endif
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// .. ARM64 ....................................................................
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#if defined(__aarch64__)
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.p2align 2
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// On entry, x8 contains a pointer to the arm64_gprs
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FN(_swift_get_cpu_context):
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stp x0, x1, [x8, #0x00]
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stp x2, x3, [x8, #0x10]
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stp x4, x5, [x8, #0x20]
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stp x6, x7, [x8, #0x30]
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stp x8, x9, [x8, #0x40]
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stp x10, x11, [x8, #0x50]
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stp x12, x13, [x8, #0x60]
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stp x14, x15, [x8, #0x70]
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stp x16, x17, [x8, #0x80]
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stp x18, x19, [x8, #0x90]
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stp x20, x21, [x8, #0xa0]
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stp x22, x23, [x8, #0xb0]
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stp x24, x25, [x8, #0xc0]
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stp x26, x27, [x8, #0xd0]
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stp x28, x29, [x8, #0xe0]
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mov x1, sp
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stp x30, x1, [x8, #0xf0]
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str x30, [x8, #0x100]
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mov x1, #0x1ffffffff
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str x1, [x8, #0x108]
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ret
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#endif
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// .. 32-bit ARM ...............................................................
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#if defined(__arm__)
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.p2align 2
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// On entry, r0 contains a pointer to the arm_gprs
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FN(_swift_get_cpu_context):
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stm r0, {r0-r14}
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str lr, [r0, #0x3c]
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mov r1, #0xffff
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str r1, [r0, #0x40]
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bx lr
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#endif
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