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cc02b8debe
This allows for the state transition kind caused by an instruction to change how we process it. It also decouples this effect from the actual CFG visiting code. This will give us the flexibility to teach the ARC optimizer in a clean way about many more types of instructions. Swift SVN r26901
507 lines
19 KiB
C++
507 lines
19 KiB
C++
//===--- GlobalARCSequenceDataflow.cpp - ARC Sequence Dataflow Analysis ---===//
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//
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// This source file is part of the Swift.org open source project
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//
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// Copyright (c) 2014 - 2015 Apple Inc. and the Swift project authors
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// Licensed under Apache License v2.0 with Runtime Library Exception
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//
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// See http://swift.org/LICENSE.txt for license information
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// See http://swift.org/CONTRIBUTORS.txt for the list of Swift project authors
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "sil-global-arc-opts"
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#include "GlobalARCSequenceDataflow.h"
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#include "ARCBBState.h"
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#include "RCStateTransitionVisitors.h"
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#include "swift/SILAnalysis/ARCAnalysis.h"
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#include "swift/SILAnalysis/PostOrderAnalysis.h"
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#include "swift/SILAnalysis/RCIdentityAnalysis.h"
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#include "swift/SIL/SILInstruction.h"
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#include "swift/SIL/SILFunction.h"
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#include "swift/SIL/SILSuccessor.h"
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#include "swift/SIL/CFG.h"
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#include "swift/SIL/SILModule.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "llvm/Support/Debug.h"
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using namespace swift;
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//===----------------------------------------------------------------------===//
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// Utilities
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//===----------------------------------------------------------------------===//
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static bool isAutoreleasePoolCall(SILInstruction &I) {
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ApplyInst *AI = dyn_cast<ApplyInst>(&I);
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if (!AI)
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return false;
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FunctionRefInst *FRI = dyn_cast<FunctionRefInst>(AI->getCallee());
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if (!FRI)
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return false;
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return llvm::StringSwitch<bool>(FRI->getReferencedFunction()->getName())
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.Case("objc_autoreleasePoolPush", true)
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.Case("objc_autoreleasePoolPop", true)
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.Default(false);
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}
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namespace {
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using ARCBBState = ARCSequenceDataflowEvaluator::ARCBBState;
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using ARCBBStateInfo = ARCSequenceDataflowEvaluator::ARCBBStateInfo;
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using ARCBBStateInfoHandle = ARCSequenceDataflowEvaluator::ARCBBStateInfoHandle;
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} // end anonymous namespace
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//===----------------------------------------------------------------------===//
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// Top Down Dataflow
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//===----------------------------------------------------------------------===//
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/// Analyze a single BB for refcount inc/dec instructions.
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///
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/// If anything was found it will be added to DecToIncStateMap.
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///
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/// NestingDetected will be set to indicate that the block needs to be
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/// reanalyzed if code motion occurs.
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static bool processBBTopDown(
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ARCBBState &BBState,
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BlotMapVector<SILInstruction *, TopDownRefCountState> &DecToIncStateMap,
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AliasAnalysis *AA, RCIdentityFunctionInfo *RCIA) {
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DEBUG(llvm::dbgs() << ">>>> Top Down!\n");
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SILBasicBlock &BB = BBState.getBB();
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bool NestingDetected = false;
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// If the current BB is the entry BB, initialize a state corresponding to each
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// of its owned parameters. This enables us to know that if we see a retain
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// before any decrements that the retain is known safe.
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//
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// We do not handle guaranteed parameters here since those are handled in the
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// code in GlobalARCPairingAnalysis. This is because even if we don't do
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// anything, we will still pair the retain, releases and then the guaranteed
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// parameter will ensure it is known safe to remove them.
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if (&BB == &*BB.getParent()->begin()) {
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auto Args = BB.getBBArgs();
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auto SignatureParams =
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BB.getParent()->getLoweredFunctionType()->getParameters();
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for (unsigned i = 0, e = Args.size(); i != e; ++i) {
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SILArgument *A = Args[i];
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ParameterConvention P = SignatureParams[i].getConvention();
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DEBUG(llvm::dbgs() << "VISITING ARGUMENT: " << *A);
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if (P != ParameterConvention::Direct_Owned)
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continue;
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TopDownRefCountState &State = BBState.getTopDownRefCountState(Args[i]);
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State.initWithArg(A);
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}
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}
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// For each instruction I in BB...
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for (auto &I : BB) {
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DEBUG(llvm::dbgs() << "VISITING:\n " << I);
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// If we see an autorelease pool call, be conservative and clear all state
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// that we are currently tracking in the BB.
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if (isAutoreleasePoolCall(I)) {
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BBState.clear();
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continue;
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}
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SILValue Op;
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RCStateTransitionKind TransitionKind = getRCStateTransitionKind(&I);
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// If I is a ref count increment instruction...
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if (TransitionKind == RCStateTransitionKind::StrongIncrement) {
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// map its operand to a newly initialized or reinitialized ref count
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// state and continue...
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Op = RCIA->getRCIdentityRoot(I.getOperand(0));
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TopDownRefCountState &State = BBState.getTopDownRefCountState(Op);
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NestingDetected |= State.initWithInst(&I);
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DEBUG(llvm::dbgs() << " REF COUNT INCREMENT! Known Safe: "
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<< (State.isKnownSafe() ? "yes" : "no") << "\n");
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// Continue processing in case this increment could be a CanUse for a
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// different pointer.
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}
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// If we have a reference count decrement...
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if (TransitionKind == RCStateTransitionKind::StrongDecrement) {
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// Look up the state associated with its operand...
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Op = RCIA->getRCIdentityRoot(I.getOperand(0));
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TopDownRefCountState &RefCountState = BBState.getTopDownRefCountState(Op);
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DEBUG(llvm::dbgs() << " REF COUNT DECREMENT!\n");
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// If we are tracking an increment on the ref count root associated with
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// the decrement and the decrement matches, pair this decrement with a
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// copy of the increment state and then clear the original increment state
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// so that we are ready to process further values.
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if (RefCountState.isRefCountInstMatchedToTrackedInstruction(&I)) {
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// Copy the current value of ref count state into the result map.
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DecToIncStateMap[&I] = RefCountState;
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DEBUG(llvm::dbgs() << " MATCHING INCREMENT:\n"
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<< RefCountState.getRCRoot());
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// Clear the ref count state in preparation for more pairs.
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RefCountState.clear();
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}
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#if NDEBUG
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else {
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if (RefCountState.isTrackingRefCountInst()) {
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DEBUG(llvm::dbgs() << " FAILED MATCH INCREMENT:\n"
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<< RefCountState.getValue());
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} else {
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DEBUG(llvm::dbgs() << " FAILED MATCH. NO INCREMENT.\n");
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}
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}
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#endif
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// Otherwise we continue processing the reference count decrement to
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// see if the decrement can affect any other pointers that we are
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// tracking.
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}
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// For all other [(SILValue, TopDownState)] we are tracking...
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for (auto &OtherState : BBState.getTopDownStates()) {
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// If we visited an increment or decrement successfully (and thus Op is
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// set), if this is the state for this operand, skip it. We already
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// processed it.
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if (Op && OtherState.first == Op)
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continue;
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// If the other state's value is blotted, skip it.
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if (!OtherState.first)
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continue;
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// If the other state is not tracking anything, bail.
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if (!OtherState.second.isTrackingRefCount())
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continue;
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// Check if the instruction we are visiting could potentially use our
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// instruction in a way that requires us to guarantee the lifetime of the
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// pointer up to this point. This has the effect of performing a use and a
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// decrement.
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if (OtherState.second.handlePotentialGuaranteedUser(&I, AA)) {
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DEBUG(llvm::dbgs() << " Found Potential Guaranteed Use:\n "
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<< OtherState.second.getRCRoot());
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continue;
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}
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// Check if the instruction we are visiting could potentially decrement
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// the reference counted value we are tracking in a manner that could
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// cause us to change states. If we do change states continue...
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if (OtherState.second.handlePotentialDecrement(&I, AA)) {
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DEBUG(llvm::dbgs() << " Found Potential Decrement:\n "
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<< OtherState.second.getRCRoot());
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continue;
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}
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// Otherwise check if the reference counted value we are tracking
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// could be used by the given instruction.
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if (OtherState.second.handlePotentialUser(&I, AA))
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DEBUG(llvm::dbgs() << " Found Potential Use:\n "
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<< OtherState.second.getRCRoot());
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}
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}
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return NestingDetected;
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}
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void ARCSequenceDataflowEvaluator::mergePredecessors(
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ARCBBStateInfoHandle &DataHandle) {
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bool HasAtLeastOnePred = false;
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llvm::SmallVector<SILBasicBlock *, 4> BBThatNeedInsertPts;
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SILBasicBlock *BB = DataHandle.getBB();
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ARCBBState &BBState = DataHandle.getState();
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// For each successor of BB...
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for (SILBasicBlock *PredBB : BB->getPreds()) {
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// Try to look up the data handle for it. If we don't have any such state,
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// then the predecessor must be unreachable from the entrance and thus is
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// uninteresting to us.
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auto PredDataHandle = getTopDownBBState(PredBB);
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if (!PredDataHandle)
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continue;
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DEBUG(llvm::dbgs() << " Merging Pred: " << PredDataHandle->getID()
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<< "\n");
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// If the predecessor is the head of a backedge in our traversal, clear any
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// state we are tracking now and clear the state of the basic block. There
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// is some sort of control flow here that we do not understand.
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if (PredDataHandle->isBackedge(BB)) {
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BBState.clear();
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break;
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}
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ARCBBState &PredBBState = PredDataHandle->getState();
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// If we found the state but the state is for a trap BB, skip it. Trap BBs
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// leak all reference counts and do not reference reference semantic objects
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// in any manner.
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//
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// TODO: I think this is a copy paste error, since we a trap BB should have
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// an unreachable at its end. See if this can be removed.
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if (PredBBState.isTrapBB())
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continue;
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if (HasAtLeastOnePred) {
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BBState.mergePredTopDown(PredBBState);
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continue;
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}
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BBState.initPredTopDown(PredBBState);
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HasAtLeastOnePred = true;
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}
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}
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bool ARCSequenceDataflowEvaluator::processTopDown() {
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bool NestingDetected = false;
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DEBUG(llvm::dbgs() << "<<<< Processing Top Down! >>>>\n");
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// For each BB in our reverse post order...
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for (auto *BB : POA->getReversePostOrder(&F)) {
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// We should always have a value here.
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auto BBDataHandle = getTopDownBBState(BB).getValue();
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// This will always succeed since we have an entry for each BB in our RPOT.
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//
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// TODO: When data handles are introduced, print that instead. This code
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// should not be touching BBIDs directly.
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DEBUG(llvm::dbgs() << "Processing BB#: " << BBDataHandle.getID() << "\n");
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DEBUG(llvm::dbgs() << "Merging Predecessors!\n");
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mergePredecessors(BBDataHandle);
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// Then perform the basic block optimization.
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NestingDetected |=
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processBBTopDown(BBDataHandle.getState(), DecToIncStateMap, AA, RCIA);
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}
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return NestingDetected;
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}
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//===----------------------------------------------------------------------===//
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// Bottom Up Dataflow
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//===----------------------------------------------------------------------===//
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/// Analyze a single BB for refcount inc/dec instructions.
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///
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/// If anything was found it will be added to DecToIncStateMap.
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///
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/// NestingDetected will be set to indicate that the block needs to be
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/// reanalyzed if code motion occurs.
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///
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/// An epilogue release is a release that post dominates all other uses of a
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/// pointer in a function that implies that the pointer is alive up to that
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/// point. We "freeze" (i.e. do not attempt to remove or move) such releases if
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/// FreezeOwnedArgEpilogueReleases is set. This is useful since in certain cases
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/// due to dataflow issues, we can not properly propagate the last use
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/// information. Instead we run an extra iteration of the ARC optimizer with
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/// this enabled in a side table so the information gets propgated everywhere in
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/// the CFG.
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bool ARCSequenceDataflowEvaluator::processBBBottomUp(
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ARCBBState &BBState, bool FreezeOwnedArgEpilogueReleases) {
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DEBUG(llvm::dbgs() << ">>>> Bottom Up!\n");
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SILBasicBlock &BB = BBState.getBB();
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bool NestingDetected = false;
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BottomUpDataflowRCStateVisitor
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DataflowVisitor(RCIA, BBState, FreezeOwnedArgEpilogueReleases,
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ConsumedArgToReleaseMap, IncToDecStateMap);
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// For each terminator instruction I in BB visited in reverse...
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for (auto II = std::next(BB.rbegin()), IE = BB.rend(); II != IE;) {
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SILInstruction &I = *II;
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++II;
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DEBUG(llvm::dbgs() << "VISITING:\n " << I);
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auto Result = DataflowVisitor.visit(&I);
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// If this instruction can have no further effects on another instructions,
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// continue. This happens for instance if we have cleared all of the state
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// we are tracking.
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if (Result.Kind == RCStateTransitionDataflowResultKind::NoEffects)
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continue;
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// Make sure that we propagate out whether or not nesting was detected.
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NestingDetected |= Result.NestingDetected;
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// This SILValue may be null if we were unable to find a specific RCIdentity
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// that the instruction "visits".
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SILValue Op = Result.RCIdentity;
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// For all other (reference counted value, ref count state) we are
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// tracking...
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for (auto &OtherState : BBState.getBottomupStates()) {
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// If this is the state associated with the instruction that we are
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// currently visiting, bail.
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if (Op && OtherState.first == Op)
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continue;
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// If the other state's value is blotted, skip it.
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if (!OtherState.first)
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continue;
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// If this state is not tracking anything, skip it.
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if (!OtherState.second.isTrackingRefCount())
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continue;
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// Check if the instruction we are visiting could potentially use our
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// instruction in a way that requires us to guarantee the lifetime of the
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// pointer up to this point. This has the effect of performing a use and a
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// decrement.
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if (OtherState.second.handlePotentialGuaranteedUser(&I, AA)) {
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DEBUG(llvm::dbgs() << " Found Potential Guaranteed Use:\n "
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<< OtherState.second.getRCRoot());
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continue;
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}
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// Check if the instruction we are visiting could potentially decrement
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// the reference counted value we are tracking... in a manner that could
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// cause us to change states. If we do change states continue...
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if (OtherState.second.handlePotentialDecrement(&I, AA)) {
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DEBUG(llvm::dbgs() << " Found Potential Decrement:\n "
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<< OtherState.second.getRCRoot());
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continue;
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}
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// Otherwise check if the reference counted value we are tracking
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// could be used by the given instruction.
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if (OtherState.second.handlePotentialUser(&I, AA))
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DEBUG(llvm::dbgs() << " Found Potential Use:\n "
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<< OtherState.second.getRCRoot());
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}
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}
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return NestingDetected;
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}
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void
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ARCSequenceDataflowEvaluator::
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mergeSuccessors(ARCBBStateInfoHandle &DataHandle) {
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SILBasicBlock *BB = DataHandle.getBB();
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ARCBBState &BBState = DataHandle.getState();
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// For each successor of BB...
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ArrayRef<SILSuccessor> Succs = BB->getSuccessors();
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bool HasAtLeastOneSucc = false;
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for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
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// If it does not have a basic block associated with it...
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auto *SuccBB = Succs[i].getBB();
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// Skip it.
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if (!SuccBB)
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continue;
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// If the BB is the head of a backedge in our traversal, we have
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// hit a loop boundary. In that case, add any instructions we are
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// tracking or instructions that we have seen to the banned
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// instruction list. Clear the instructions we are tracking
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// currently, but leave that we saw a release on them. In a post
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// order, we know that all of a BB's successors will always be
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// visited before the BB, implying we will know if conservatively
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// we saw a release on the pointer going down all paths.
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if (DataHandle.isBackedge(SuccBB)) {
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BBState.clear();
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break;
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}
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// Otherwise, lookup the BBState associated with the successor and merge
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// the successor in. We know this will always succeed.
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auto SuccDataHandle = *getBottomUpBBState(SuccBB);
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ARCBBState &SuccBBState = SuccDataHandle.getState();
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if (SuccBBState.isTrapBB())
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continue;
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if (HasAtLeastOneSucc) {
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BBState.mergeSuccBottomUp(SuccBBState);
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continue;
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}
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BBState.initSuccBottomUp(SuccBBState);
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HasAtLeastOneSucc = true;
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}
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}
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bool ARCSequenceDataflowEvaluator::processBottomUp(
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bool FreezeOwnedArgEpilogueReleases) {
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bool NestingDetected = false;
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DEBUG(llvm::dbgs() << "<<<< Processing Bottom Up! >>>>\n");
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// For each BB in our post order...
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for (auto *BB : POA->getPostOrder(&F)) {
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// Grab the BBState associated with it and set it to be the current BB.
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auto BBDataHandle = *getBottomUpBBState(BB);
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// This will always succeed since we have an entry for each BB in our post
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// order.
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DEBUG(llvm::dbgs() << "Processing BB#: " << BBDataHandle.getID() << "\n");
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DEBUG(llvm::dbgs() << "Merging Successors!\n");
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mergeSuccessors(BBDataHandle);
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// Then perform the basic block optimization.
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NestingDetected |= processBBBottomUp(BBDataHandle.getState(),
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FreezeOwnedArgEpilogueReleases);
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}
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return NestingDetected;
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}
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//===----------------------------------------------------------------------===//
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// Top Level ARC Sequence Dataflow Evaluator
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//===----------------------------------------------------------------------===//
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ARCSequenceDataflowEvaluator::ARCSequenceDataflowEvaluator(
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SILFunction &F, AliasAnalysis *AA, PostOrderAnalysis *POA,
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RCIdentityFunctionInfo *RCIA,
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BlotMapVector<SILInstruction *, TopDownRefCountState> &DecToIncStateMap,
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BlotMapVector<SILInstruction *, BottomUpRefCountState> &IncToDecStateMap)
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: F(F), AA(AA), POA(POA), RCIA(RCIA), DecToIncStateMap(DecToIncStateMap),
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IncToDecStateMap(IncToDecStateMap),
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// We use a malloced pointer here so we don't need to expose
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// ARCBBStateInfo in the header.
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BBStateInfo(new ARCBBStateInfo(&F, POA)),
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ConsumedArgToReleaseMap(RCIA, &F) {}
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bool ARCSequenceDataflowEvaluator::run(bool FreezeOwnedReleases) {
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bool NestingDetected = processBottomUp(FreezeOwnedReleases);
|
|
NestingDetected |= processTopDown();
|
|
return NestingDetected;
|
|
}
|
|
|
|
ARCSequenceDataflowEvaluator::~ARCSequenceDataflowEvaluator() {
|
|
// We use a malloced pointer here so we don't need to expose the type to the
|
|
// outside world.
|
|
delete BBStateInfo;
|
|
}
|
|
|
|
void ARCSequenceDataflowEvaluator::clear() { BBStateInfo->clear(); }
|
|
|
|
llvm::Optional<ARCBBStateInfoHandle>
|
|
ARCSequenceDataflowEvaluator::getBottomUpBBState(SILBasicBlock *BB) {
|
|
return BBStateInfo->getBottomUpBBHandle(BB);
|
|
}
|
|
|
|
llvm::Optional<ARCBBStateInfoHandle>
|
|
ARCSequenceDataflowEvaluator::getTopDownBBState(SILBasicBlock *BB) {
|
|
return BBStateInfo->getTopDownBBHandle(BB);
|
|
}
|