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This patch replaces the stateful generation of SILScope information in SILGenFunction with data derived from the ASTScope hierarchy, which should be 100% in sync with the scopes needed for local variables. The goal is to eliminate the surprising effects that the stack of cleanup operations can have on the current state of SILBuilder leading to a fully deterministic (in the sense of: predictible by a human) association of SILDebugScopes with SILInstructions. The patch also eliminates the need to many workarounds. There are still some accomodations for several Sema transformation passes such as ResultBuilders, which don't correctly update the source locations when moving around nodes. If these were implemented as macros, this problem would disappear. This necessary rewrite of the macro scope handling included in this patch also adds proper support nested macro expansions. This fixes rdar://88274783 and either fixes or at least partially addresses the following: rdar://89252827 rdar://105186946 rdar://105757810 rdar://105997826 rdar://105102288
548 lines
19 KiB
C++
548 lines
19 KiB
C++
//===--- AllocStackHoisting.cpp - Hoist alloc_stack instructions ----------===//
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//
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// This source file is part of the Swift.org open source project
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//
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// Copyright (c) 2014 - 2017 Apple Inc. and the Swift project authors
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// Licensed under Apache License v2.0 with Runtime Library Exception
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//
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// See https://swift.org/LICENSE.txt for license information
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// See https://swift.org/CONTRIBUTORS.txt for the list of Swift project authors
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "alloc-stack-hoisting"
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#include "swift/AST/Availability.h"
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#include "swift/AST/IRGenOptions.h"
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#include "swift/AST/SemanticAttrs.h"
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#include "swift/IRGen/IRGenSILPasses.h"
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#include "swift/SIL/DebugUtils.h"
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#include "swift/SIL/Dominance.h"
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#include "swift/SIL/LoopInfo.h"
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#include "swift/SIL/SILArgument.h"
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#include "swift/SIL/SILBuilder.h"
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#include "swift/SIL/SILInstruction.h"
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#include "swift/SILOptimizer/Analysis/Analysis.h"
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#include "swift/SILOptimizer/Analysis/DominanceAnalysis.h"
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#include "swift/SILOptimizer/PassManager/Passes.h"
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#include "swift/SILOptimizer/PassManager/Transforms.h"
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#include "swift/SILOptimizer/Utils/CFGOptUtils.h"
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#include "IRGenModule.h"
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#include "NonFixedTypeInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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using namespace swift;
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llvm::cl::opt<bool> SILUseStackSlotMerging(
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"sil-merge-stack-slots", llvm::cl::init(true),
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llvm::cl::desc("Merge generic alloc_stack instructions"));
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/// Hoist generic alloc_stack instructions to the entry basic block and merge
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/// alloc_stack instructions if their users span non-overlapping live-ranges.
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///
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/// This helps avoid llvm.stacksave/stackrestore intrinsic calls during code
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/// generation. IRGen will only dynamic alloca instructions if the alloc_stack
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/// is in the entry block but will emit a dynamic alloca and
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/// llvm.stacksave/stackrestore for all other basic blocks.
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///
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/// Merging alloc_stack instructions saves code size and stack size.
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/// An alloc_stack instructions is hoistable if it is of generic type and the
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/// type parameter is not dependent on an opened type.
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static bool isHoistable(AllocStackInst *Inst, irgen::IRGenModule &Mod) {
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auto SILTy = Inst->getType();
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// We don't need to hoist types that have reference semantics no dynamic
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// alloca will be generated as they are fixed size.
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if (SILTy.hasReferenceSemantics())
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return false;
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// Only hoist types that are dynamically sized (generics and resilient types).
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auto &TI = Mod.getTypeInfo(SILTy);
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if (TI.isFixedSize())
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return false;
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// Don't hoist weakly imported (weakly linked) types.
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bool foundWeaklyImported =
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SILTy.getASTType().findIf([&Mod](CanType type) -> bool {
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if (auto nominal = type->getNominalOrBoundGenericNominal())
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if (nominal->isWeakImported(Mod.getSwiftModule())) {
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return true;
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}
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return false;
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});
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if (foundWeaklyImported)
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return false;
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// Don't hoist generics with opened archetypes. We would have to hoist the
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// open archetype instruction which might not be possible.
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return Inst->getTypeDependentOperands().empty();
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}
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/// A partition of alloc_stack instructions.
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///
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/// Initially, a partition contains alloc_stack instructions of one type.
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/// After merging non-overlapping alloc_stack live ranges, a partition contains
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/// a set of alloc_stack instructions that can be assigned a single stack
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/// location.
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namespace {
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class Partition {
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public:
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SmallVector<AllocStackInst *, 4> Elts;
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Partition(AllocStackInst *A) : Elts(1, A) {}
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Partition() {}
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/// Assign a single alloc_stack instruction to all the alloc_stacks in the
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/// partition.
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///
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/// This assumes that the live ranges of the alloc_stack instructions are
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/// non-overlapping.
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void assignStackLocation(
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SmallVectorImpl<SILInstruction *> &FunctionExits,
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SmallVectorImpl<DebugValueInst *> &DebugValueToBreakBlocksAt);
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/// Returns true if any of the alloc_stack that we are merging were
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/// moved. Causes us to insert extra debug addr.
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///
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/// TODO: In the future we want to do this for /all/ alloc_stack but that
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/// would require us moving /most of/ swift's IRGen emission to use
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/// llvm.dbg.addr instead of llvm.dbg.declare and that would require us to do
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/// statistics to make sure that we haven't hurt debuggability by making the
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/// change.
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bool hasMovedElt() const {
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return llvm::any_of(Elts, [](AllocStackInst *asi) {
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return asi->getUsesMoveableValueDebugInfo();
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});
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}
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};
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} // end anonymous namespace
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/// Erases all dealloc_stack users of an alloc_stack
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static void eraseDeallocStacks(AllocStackInst *AllocStack) {
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// Delete dealloc_stacks.
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SmallVector<DeallocStackInst *, 16> DeallocStacksToDelete;
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for (auto *U : AllocStack->getUses()) {
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if (auto *DeallocStack = dyn_cast<DeallocStackInst>(U->getUser()))
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DeallocStacksToDelete.push_back(DeallocStack);
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}
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for (auto *D : DeallocStacksToDelete)
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D->eraseFromParent();
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}
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/// Inserts a dealloc_stack at all the function exits.
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static void
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insertDeallocStackAtEndOf(SmallVectorImpl<SILInstruction *> &FunctionExits,
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AllocStackInst *AllocStack) {
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// Insert dealloc_stack in the exit blocks.
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for (auto *Exit : FunctionExits) {
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SILBuilderWithScope Builder(Exit);
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Builder.createDeallocStack(CleanupLocation(AllocStack->getLoc()),
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AllocStack);
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}
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}
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/// Hack to workaround a clang LTO bug.
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LLVM_ATTRIBUTE_NOINLINE
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void moveAllocStackToBeginningOfBlock(
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AllocStackInst *AS, SILBasicBlock *BB, bool haveMovedElt,
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SmallVectorImpl<DebugValueInst *> &DebugValueToBreakBlocksAt) {
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// If we have var info, create the debug_value at the alloc_stack position and
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// invalidate the alloc_stack's var info. This transfers the debug info state
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// of the debug_value to the original position.
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if (haveMovedElt) {
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if (auto varInfo = AS->getVarInfo()) {
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SILBuilderWithScope Builder(AS);
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// SILBuilderWithScope skips over meta instructions when picking a scope.
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Builder.setCurrentDebugScope(AS->getDebugScope());
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auto *DVI = Builder.createDebugValue(AS->getLoc(), AS, *varInfo);
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DVI->setUsesMoveableValueDebugInfo();
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DebugValueToBreakBlocksAt.push_back(DVI);
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AS->invalidateVarInfo();
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AS->markUsesMoveableValueDebugInfo();
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}
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}
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AS->moveFront(BB);
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}
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/// Assign a single alloc_stack instruction to all the alloc_stacks in the
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/// partition.
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void Partition::assignStackLocation(
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SmallVectorImpl<SILInstruction *> &FunctionExits,
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SmallVectorImpl<DebugValueInst *> &DebugValueToBreakBlocksAt) {
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assert(!Elts.empty() && "Must have a least one location");
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bool hasAtLeastOneMovedElt = hasMovedElt();
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// The assigned location is the first alloc_stack in our partition.
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auto *AssignedLoc = Elts[0];
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// Move this assigned location to the beginning of the entry block.
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auto *EntryBB = AssignedLoc->getFunction()->getEntryBlock();
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moveAllocStackToBeginningOfBlock(AssignedLoc, EntryBB, hasAtLeastOneMovedElt,
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DebugValueToBreakBlocksAt);
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// Erase the dealloc_stacks.
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eraseDeallocStacks(AssignedLoc);
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// Insert a new dealloc_stack at the exit(s) of the function.
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insertDeallocStackAtEndOf(FunctionExits, AssignedLoc);
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// Rewrite all the other alloc_stacks in the partition to use the assigned
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// location.
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for (auto *AllocStack : Elts) {
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if (AssignedLoc == AllocStack) continue;
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eraseDeallocStacks(AllocStack);
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AllocStack->replaceAllUsesWith(AssignedLoc);
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if (hasAtLeastOneMovedElt) {
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if (auto VarInfo = AllocStack->getVarInfo()) {
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SILBuilderWithScope Builder(AllocStack);
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auto *DVI = Builder.createDebugValue(AllocStack->getLoc(), AssignedLoc,
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*VarInfo);
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DVI->setUsesMoveableValueDebugInfo();
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DebugValueToBreakBlocksAt.push_back(DVI);
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}
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}
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AllocStack->eraseFromParent();
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}
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}
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/// Returns a single dealloc_stack user of the alloc_stack or nullptr otherwise.
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static SILInstruction *getSingleDeallocStack(AllocStackInst *ASI) {
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return ASI->getSingleDeallocStack();
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}
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namespace {
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/// Compute liveness for the partition to allow for an interference check
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/// between two alloc_stack instructions.
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///
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/// For now liveness is computed and this just performs a simple check
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/// whether two regions of alloc_stack instructions might overlap.
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class Liveness {
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public:
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Liveness(Partition &P) {}
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/// Check whether the live ranges of the two alloc_stack instructions
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/// might overlap.
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///
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/// Currently this does not use a liveness analysis. Rather we check that for
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/// both alloc_stack we have:
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/// * a single dealloc_stack user
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/// * the dealloc_stack is in the same basic block
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/// If the alloc_stack instructions are in different basic blocks we know that
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/// the live-ranges can't overlap.
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/// If they are in the same basic block we scan the basic block to determine
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/// whether one dealloc_stack dominates the other alloc_stack. If this is the
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/// case the live ranges can't overlap.
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bool mayOverlap(AllocStackInst *A, AllocStackInst *B) {
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assert(A != B);
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// Check that we have a single dealloc_stack user in the same block.
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auto *singleDeallocA = getSingleDeallocStack(A);
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if (singleDeallocA == nullptr ||
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singleDeallocA->getParent() != A->getParent())
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return true;
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auto *singleDeallocB = getSingleDeallocStack(B);
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if (singleDeallocB == nullptr ||
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singleDeallocB->getParent() != B->getParent())
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return true;
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// Different basic blocks.
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if (A->getParent() != B->getParent())
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return false;
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bool ALive = false;
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bool BLive = false;
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for (auto &Inst : *A->getParent()) {
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if (A == &Inst) {
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ALive = true;
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} else if (singleDeallocA == &Inst) {
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ALive = false;
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} else if (B == &Inst) {
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BLive = true;
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} else if (singleDeallocB == &Inst) {
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BLive = false;
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}
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if (ALive && BLive)
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return true;
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}
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return false;
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}
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};
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} // end anonymous namespace
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namespace {
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/// Merge alloc_stack instructions.
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///
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/// This merges alloc_stack instructions of one type by:
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/// * building partitions of alloc_stack instructions of one type
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/// * merging alloc_stack instructions in each partition into one alloc_stack
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/// if the live ranges spanned by the alloc_stack users are known not to
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/// overlap.
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class MergeStackSlots {
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/// Contains partitions of alloc_stack instructions by type.
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SmallVector<Partition, 2> PartitionByType;
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/// The function exits.
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SmallVectorImpl<SILInstruction *> &FunctionExits;
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/// If we are merging any alloc_stack that were moved, to work around a bug in
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/// SelectionDAG that sinks to llvm.dbg.addr, we need to break blocks right
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/// after each llvm.dbg.addr.
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///
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/// TODO: Once we have /any/ FastISel/better SelectionDAG support, this can be
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/// removed.
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SmallVector<DebugValueInst *, 4> DebugValueToBreakBlocksAt;
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public:
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MergeStackSlots(SmallVectorImpl<AllocStackInst *> &AllocStacks,
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SmallVectorImpl<SILInstruction *> &FuncExits);
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/// Merge alloc_stack instructions if possible and hoist them to the entry
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/// block.
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SILAnalysis::InvalidationKind mergeSlots(DominanceInfo *domToUpdate);
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};
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} // end anonymous namespace
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MergeStackSlots::MergeStackSlots(SmallVectorImpl<AllocStackInst *> &AllocStacks,
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SmallVectorImpl<SILInstruction *> &FuncExits)
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: FunctionExits(FuncExits) {
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// Build initial partitions based on the type.
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llvm::DenseMap<SILType, unsigned> TypeToPartitionMap;
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for (auto *AS : AllocStacks) {
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auto Ty = AS->getType();
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auto It = TypeToPartitionMap.find(Ty);
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if (It != TypeToPartitionMap.end()) {
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PartitionByType[It->second].Elts.push_back(AS);
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} else {
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PartitionByType.push_back(Partition(AS));
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TypeToPartitionMap[Ty] = PartitionByType.size() - 1;
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}
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}
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}
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/// Merge alloc_stack instructions if possible and hoist them to the entry
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/// block.
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SILAnalysis::InvalidationKind
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MergeStackSlots::mergeSlots(DominanceInfo *DomToUpdate) {
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auto Result = SILAnalysis::InvalidationKind::Instructions;
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for (auto &PartitionOfOneType : PartitionByType) {
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Liveness Live(PartitionOfOneType);
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// Partitions that are know to contain non-overlapping alloc_stack
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// live-ranges.
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SmallVector<Partition, 4> DisjointPartitions(1, Partition());
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// Look at all the alloc_stacks of one type.
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for (auto *CurAllocStack : PartitionOfOneType.Elts) {
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bool FoundAPartition = false;
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// Check if we can add it to an existing partition that we have show to be
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// non-interfering.
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for (auto &CandidateP : DisjointPartitions) {
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// If the candidate partition is empty (the very first time we look at an
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// alloc_stack) we can just add the alloc_stack.
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if (CandidateP.Elts.empty()) {
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CandidateP.Elts.push_back(CurAllocStack);
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FoundAPartition = true;
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break;
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}
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// Otherwise, we check interference of the current alloc_stack with the
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// candidate partition.
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bool InterferesWithCandidateP = false;
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for (auto *AllocStackInPartition : CandidateP.Elts) {
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if (Live.mayOverlap(AllocStackInPartition, CurAllocStack)) {
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InterferesWithCandidateP = true;
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break;
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}
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}
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// No interference add the current alloc_stack to the candidate
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// partition.
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if (!InterferesWithCandidateP) {
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CandidateP.Elts.push_back(CurAllocStack);
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FoundAPartition = true;
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break;
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}
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// Otherwise, we look at the next partition.
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}
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// If not partition was found add a new one.
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if (!FoundAPartition) {
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DisjointPartitions.push_back(Partition(CurAllocStack));
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}
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}
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// Assign stack locations to disjoint partition hoisting alloc_stacks to the
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// entry block at the same time.
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for (auto &Par : DisjointPartitions) {
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Par.assignStackLocation(FunctionExits, DebugValueToBreakBlocksAt);
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}
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}
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// Now that we have finished merging slots/hoisting, break any blocks that we
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// need to.
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if (!DebugValueToBreakBlocksAt.empty()) {
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auto &Mod = DebugValueToBreakBlocksAt.front()->getModule();
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SILBuilderContext Context(Mod);
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do {
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auto *Next = DebugValueToBreakBlocksAt.pop_back_val();
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splitBasicBlockAndBranch(Context, Next->getNextInstruction(), DomToUpdate,
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nullptr);
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} while (!DebugValueToBreakBlocksAt.empty());
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Result = SILAnalysis::InvalidationKind::BranchesAndInstructions;
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}
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return Result;
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}
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namespace {
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/// Hoist alloc_stack instructions to the entry block and merge them.
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class HoistAllocStack {
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/// The function to process.
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SILFunction *F;
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/// The current IRGenModule.
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irgen::IRGenModule &IRGenMod;
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SmallVector<AllocStackInst *, 16> AllocStackToHoist;
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SmallVector<SILInstruction *, 8> FunctionExits;
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Optional<SILAnalysis::InvalidationKind> InvalidationKind = None;
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DominanceInfo *DomInfoToUpdate = nullptr;
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public:
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HoistAllocStack(SILFunction *F, irgen::IRGenModule &Mod)
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: F(F), IRGenMod(Mod) {}
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/// Try to hoist generic alloc_stack instructions to the entry block. Returns
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/// none if the function was not changed. Otherwise, returns the analysis
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/// invalidation kind to use if the function was changed.
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Optional<SILAnalysis::InvalidationKind> run();
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void setDominanceToUpdate(DominanceInfo *DI) { DomInfoToUpdate = DI; }
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private:
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/// Collect generic alloc_stack instructions that can be moved to the entry
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/// block.
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void collectHoistableInstructions();
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/// Move the hoistable alloc_stack instructions to the entry block.
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void hoist();
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};
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} // end anonymous namespace
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bool inhibitsAllocStackHoisting(SILInstruction *I) {
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if (auto *Apply = dyn_cast<ApplyInst>(I)) {
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return Apply->hasSemantics(semantics::AVAILABILITY_OSVERSION);
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}
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if (auto *bi = dyn_cast<BuiltinInst>(I)) {
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return bi->getBuiltinInfo().ID == BuiltinValueKind::TargetOSVersionAtLeast;
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}
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if (isa<HasSymbolInst>(I)) {
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return true;
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}
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return false;
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}
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/// Collect generic alloc_stack instructions in the current function can be
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/// hoisted.
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/// We can hoist generic alloc_stack instructions if they are not dependent on a
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/// another instruction that we would have to hoist.
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/// A generic alloc_stack could reference an opened archetype that was not
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/// opened in the entry block.
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void HoistAllocStack::collectHoistableInstructions() {
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for (auto &BB : *F) {
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for (auto &Inst : BB) {
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// Terminators that are function exits are our dealloc_stack
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// insertion points.
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if (auto *Term = dyn_cast<TermInst>(&Inst)) {
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if (Term->isFunctionExiting())
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FunctionExits.push_back(Term);
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continue;
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}
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// Don't perform alloc_stack hoisting in functions containing
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// instructions that indicate hoisting may be unsafe (e.g. `if
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// #available(...)` or `if #_hasSymbol(...)`.
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if (inhibitsAllocStackHoisting(&Inst)) {
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AllocStackToHoist.clear();
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return;
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}
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|
auto *ASI = dyn_cast<AllocStackInst>(&Inst);
|
|
if (!ASI) {
|
|
continue;
|
|
}
|
|
if (isHoistable(ASI, IRGenMod)) {
|
|
LLVM_DEBUG(llvm::dbgs() << "Hoisting " << Inst);
|
|
AllocStackToHoist.push_back(ASI);
|
|
} else {
|
|
LLVM_DEBUG(llvm::dbgs() << "Not hoisting " << Inst);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/// Hoist the alloc_stack instructions to the entry block and sink the
|
|
/// dealloc_stack instructions to the function exists.
|
|
void HoistAllocStack::hoist() {
|
|
if (SILUseStackSlotMerging) {
|
|
MergeStackSlots Merger(AllocStackToHoist, FunctionExits);
|
|
InvalidationKind = Merger.mergeSlots(DomInfoToUpdate);
|
|
return;
|
|
}
|
|
|
|
// Hoist alloc_stacks to the entry block and delete dealloc_stacks.
|
|
auto *EntryBB = F->getEntryBlock();
|
|
for (auto *AllocStack : AllocStackToHoist) {
|
|
// Insert at the beginning of the entry block.
|
|
AllocStack->moveFront(EntryBB);
|
|
// Delete dealloc_stacks.
|
|
eraseDeallocStacks(AllocStack);
|
|
InvalidationKind = SILAnalysis::InvalidationKind::Instructions;
|
|
}
|
|
// Insert dealloc_stack in the exit blocks.
|
|
for (auto *AllocStack : AllocStackToHoist) {
|
|
insertDeallocStackAtEndOf(FunctionExits, AllocStack);
|
|
}
|
|
}
|
|
|
|
/// Try to hoist generic alloc_stack instructions to the entry block.
|
|
/// Returns true if the function was changed.
|
|
Optional<SILAnalysis::InvalidationKind> HoistAllocStack::run() {
|
|
collectHoistableInstructions();
|
|
|
|
// Nothing to hoist?
|
|
if (AllocStackToHoist.empty())
|
|
return {};
|
|
|
|
hoist();
|
|
return InvalidationKind;
|
|
}
|
|
|
|
namespace {
|
|
class AllocStackHoisting : public SILFunctionTransform {
|
|
void run() override {
|
|
auto *F = getFunction();
|
|
auto *Mod = getIRGenModule();
|
|
assert(Mod && "This pass must be run as part of an IRGen pipeline");
|
|
|
|
HoistAllocStack Hoist(F, *Mod);
|
|
|
|
// Update DomInfo when breaking. We don't use loop info right now this late,
|
|
// so we don't need to do that.
|
|
auto *DA = getAnalysis<DominanceAnalysis>();
|
|
if (DA->hasFunctionInfo(F))
|
|
Hoist.setDominanceToUpdate(DA->get(F));
|
|
|
|
auto InvalidationKind = Hoist.run();
|
|
|
|
if (InvalidationKind) {
|
|
AnalysisPreserver preserveDominance(DA);
|
|
PM->invalidateAnalysis(F, *InvalidationKind);
|
|
}
|
|
}
|
|
};
|
|
} // end anonymous namespace
|
|
|
|
SILTransform *irgen::createAllocStackHoisting() {
|
|
return new AllocStackHoisting();
|
|
}
|