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ASoC: spacemit: adjust FIFO trigger threshold to half FIFO size
Set both TX and RX FIFO trigger thresholds (TFT/RFT) to 0xF (half of the 32-entry FIFO) instead of 5. This provides better DMA efficiency by allowing more data to accumulate before triggering a DMA request, reducing the number of DMA transactions needed. Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Link: https://patch.msgid.link/20260429-k3-i2s-v1-3-2fe99db11ecb@linux.spacemit.com Signed-off-by: Mark Brown <broonie@kernel.org>
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committed by
Mark Brown
parent
6b4afbaaa3
commit
03dcb5b68a
@@ -93,8 +93,8 @@ static void spacemit_i2s_init(struct spacemit_i2s_dev *i2s)
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u32 sscr_val, sspsp_val, ssfcr_val, ssrwt_val;
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sscr_val = SSCR_TRAIL | SSCR_FRF_PSP;
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ssfcr_val = FIELD_PREP(SSFCR_FIELD_TFT, 5) |
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FIELD_PREP(SSFCR_FIELD_RFT, 5) |
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ssfcr_val = FIELD_PREP(SSFCR_FIELD_TFT, 0xF) |
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FIELD_PREP(SSFCR_FIELD_RFT, 0xF) |
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SSFCR_RSRE | SSFCR_TSRE;
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ssrwt_val = SSRWT_RWOT;
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sspsp_val = SSPSP_SFRMP;
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