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drm/amd/display: Promote DC to 3.2.377

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This version brings along the following updates:

- Enable sink freesync via MCCS with pcon whitelist adjustments
- Rework YCbCr422 DSC policy
- Update DML2.1 parameters
- Fix coding style issues and compiler warnings

Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Taimur Hassan
2026-04-17 15:21:50 -04:00
committed by Alex Deucher
parent a62346043a
commit 1e65171a1d
1 changed files with 1 additions and 1 deletions
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drivers/gpu/drm/amd/display/dc/dc.h
+1 -1
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@@ -63,7 +63,7 @@ struct dcn_dsc_reg_state;
struct dcn_optc_reg_state;
struct dcn_dccg_reg_state;
#define DC_VER "3.2.376"
#define DC_VER "3.2.377"
/**
* MAX_SURFACES - representative of the upper bound of surfaces that can be piped to a single CRTC